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FS32K142HEX0MLFT bảng dữ liệu(PDF) 27 Page - NXP Semiconductors

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FS32K142HEX0MLFT bảng dữ liệu(HTML) 27 Page - NXP Semiconductors

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The following table shows the power consumption targets for S32K148 in various mode
of operations measure at 3.3 V.
Table 15. Power consumption at 3.3 V
Chip/Device
Ambient
Temperature
(°C)
RUN@80 MHz (mA)
HSRUN@112 MHz (mA)1
Peripherals
enabled +
QSPI
Peripherals
enabled +
ENET + SAI
Peripherals
enabled +
QSPI
Peripherals
enabled +
ENET + SAI
S32K148
25
Typ
67.3
79.1
89.8
105.5
85
Typ
67.4
79.2
95.6
105.9
Max
82.5
88.2
109.7
117.4
105
Typ
68.0
79.8
96.6
106.7
Max
80.3
89.1
109.0
119.0
125
Max
83.5
94.7
NA
1. HSRUN mode must not be used at 125°C. Max ambient temperature for HSRUN mode is 105°C.
4.8 ESD and latch-up protection characteristics
Symbol
Description
Min.
Max.
Unit
VHBM
Electrostatic discharge voltage, human body model1, 2, 3
− 4000
4000
V
VCDM
Electrostatic discharge voltage, charged-device model1, 2, 4
All pins except the corner pins
− 500
500
V
Corner pins only
− 750
750
V
ILAT
Latch-up current at ambient temperature of 125 °C5
− 100
100
mA
1. Device failure is defined as: "If after exposure to ESD pulses, the device does not meet specification requirements."
2. All ESD testing conforms with AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits.
3. This parameter is tested in conformity with AEC-Q100-002.
4. This parameter is tested in conformity with AEC-Q100-011.
5. This parameter is tested in conformity with AEC-Q100-004.
4.9 EMC radiated emissions operating behaviors
EMC measurements to IC-level IEC standards are available from NXP on request.
General
S32K1xx Data Sheet, Rev. 14, 08/2021
NXP Semiconductors
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