ADN8834ACPZ-R2 datasheet(22/27 Pages) AD

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ADN8834

Data Sheet

Rev. B | Page 22 of 27

Switching Loss (PSW)

Switching losses are associated with the current drawn by the

controller to turn the power devices on and off at the switching

frequency. Each time a power device gate is turned on or off,

the controller transfers a charge from the input supply to the

gate, and then from the gate to ground. Use the following

equation to estimate the switching loss:

PSW = (CGATE_HS + CGATE_LS) × VIN2 × fSW

where:

CGATE_HS is the gate capacitance of the high-side MOSFET.

CGATE_LS is the gate capacitance of the low-side MOSFET.

fSW is the switching frequency.

For the ADN8834, the total of (CGATE_HS + CGATE_LS) is

approximately 1 nF.

Transition Loss (PTRAN)

Transition losses occur because the high-side MOSFET cannot

turn on or off instantaneously. During a switch node transition,

the MOSFET provides all the inductor current. The source-to-

drain voltage of the MOSFET is half the input voltage, resulting

in power loss. Transition losses increase with both load and input

voltage and occur twice for each switching cycle.

Use the following equation to estimate the transition loss:

PTRAN = 0.5 × VIN × IOUT × (tR + tF) × fSW

where:

tR is the rise time of the switch node.

tF is the fall time of the switch node.

For the ADN8834, tR and tF are both approximately 1 ns.

Linear Regulator Power Dissipation

The power dissipation of the linear regulator is given by the

following equation:

PLINEAR = [(VIN − VOUT) × IOUT] + (VIN × IGND)

where:

VIN and VOUT are the input and output voltages of the linear

regulator.

IOUT is the load current of the linear regulator.

IGND is the ground current of the linear regulator.

Power dissipation due to the ground current is generally small

and can be ignored for the purposes of this calculation.

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