ADN8834ACPZ-R2 datasheet(16/27 Pages) AD

16 / 27 page

ADN8834

Data Sheet

Rev. B | Page 16 of 27

approach VB, the ramp slows down to avoid possible current

overshoot at the point where the TEC voltage starts to build up.

LDR

SFB

TIME

DISCHARGE

PREBIAS

SOFT START

BEGINS

TEC VOLTAGE

BUILDS UP

REACH

VOLTAGE LIMIT

Figure 30. Soft Start Profile in Cooling Mode

TEC VOLTAGE/CURRENT MONITOR

The TEC real-time voltage and current are detectable at VTEC

and ITEC, respectively.

Voltage Monitor

VTEC is an analog voltage output pin with a voltage proportional

to the actual voltage across the TEC. A center VTEC voltage of

1.25 V corresponds to 0 V across the TEC. Convert the voltage

at VTEC and the voltage across the TEC using the following

equation:

VVTEC = 1.25 V + 0.25 × (VLDR − VSFB)

Current Monitor

ITEC is an analog voltage output pin with a voltage proportional

to the actual current through the TEC. A center ITEC voltage of

1.25 V corresponds to 0 A through the TEC. Convert the

voltage at ITEC and the current through the TEC using the

following equations:

VITEC_COOLING = 1.25 V + ILDR × RCS

where the current sense gain (RCS) is 0.525 V/A.

VITEC_HEATING = 1.25 V − ILDR × RCS

MAXIMUM TEC VOLTAGE LIMIT

The maximum TEC voltage is set by applying a voltage divider

at the VLIM/SD pin to protect the TEC. The voltage limiter

operates bidirectionally and allows the cooling limit to be

different from the heating limit.

Using a Resistor Divider to Set the TEC Voltage Limit

Separate voltage limits are set using a resistor divider. The

internal current sink circuitry connected to VLIM/SD draws a

current when the ADN8834 drives the TEC in a heating direction,

which lowers the voltage at VLIM/SD. The current sink is not

active when the TEC is driven in a cooling direction; therefore,

the TEC heating voltage limit is always lower than the cooling

voltage limit.

VLIM/SD

TEC VOLTAGE

LIMIT AND

INTERNAL

SOFT START

10µA

HEATING

CLK

DISABLE

VREF

RV1

RV2

SW OPEN = VVLIMC

SW CLOSED = VVLIMH

Figure 31. Using a Resistor Divider to Set the TEC Voltage Limit

Calculate the cooling and heating limits using the following

equations:

VVLIM_COOLING = VREF × RV2/(RV1 +RV2)

where VREF = 2.5 V.

VVLIM_HEATING = VVLIM_COOLING − ISINK_VLIM × RV1||RV2

where ISINK_VLIM = 10 µA.

VTEC_MAX_COOLING = VVLIM_COOLING × AVLIM

where AVLIM = 2 V/V.

VTEC_MAX_HEATING = VVLIM_HEATING × AVLIM

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