71M6545HT-IGTSLASHF datasheet(33/66 Pages) MAXIM

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71M6545T/71M6545HT

Energy Meter ICs

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UART

The 71M6545T/HT includes a UART (UART0) that can

be programmed to communicate with a variety of AMR

modules and other external devices.

SPI Slave Port

The SPI slave port communicates directly with the MPU

data bus and is able to read and write Data RAM and

I/O RAM locations. It is also able to send commands to

the MPU. The interface to the slave port consists of the

SPI_CSZ, SPI_CKI, SPI_DI and SPI_DO pins.

Additionally, the SPI interface allows flash memory to

be read and to be programmed. To facilitate flash pro-

gramming, cycling power or asserting RESET causes

the SPI port pins to default to SPI mode. The SPI port is

disabled by clearing the SPI_E bit.

Possible applications for the SPI interface are:

• An external host reads data from CE locations to

obtain metering information. This can be used in

applications where the 71M654xT function as a smart

front-end with preprocessing capability. Since the

addresses are in 16-bit format, any type of XRAM data

can be accessed: CE, MPU, I/O RAM, but not SFRs or

the 80515-internal register bank.

• A communication link can be established via the SPI

interface: By writing into MPU memory locations, the

external host can initiate and control processes in the

71M654xT MPU. Writing to a CE or MPU location

normally generates an interrupt, a function that can be

used to signal to the MPU that the byte that had just

been written by the external host must be read and

processed. Data can also be inserted by the external

host without generating an interrupt.

• An external DSP can access front-end data gener-

ated by the ADC. This mode of operation uses the

71M654xT as an analog front-end (AFE).

• Flash programming by the external host (SPI Flash

Mode).

SPI Safe Mode

Sometimes it is desirable to prevent the SPI interface

from writing to arbitrary RAM locations and thus disturb-

ing MPU and CE operation. This is especially true in AFE

applications. For this reason, the SPI SAFE mode was

created. In SPI SAFE mode, SPI write operations are

disabled except for a 16 byte transfer region at address

0x400 to 0x40F. If the SPI host needs to write to other

addresses, it must use the SPI_CMD register to request

the write operation from the MPU. SPI SAFE mode is

enabled by the SPI_SAFE bit.

SPI Flash Mode (SFM)

In normal operation, the SPI slave interface cannot read

or write the flash memory. However, the 71M6545T/HT

supports an SPI Flash Mode (SFM) which facilitates initial

programming of the flash memory. When in SFM mode,

the SPI can erase, read, and write the flash memory.

Other memory elements such as XRAM and I/O RAM are

not accessible in this mode. In order to protect the flash

contents, several operations are required before the SFM

mode is successfully invoked.

In SFM mode, n byte reads and dual-byte writes to flash

memory are supported. Since the flash write operation is

always based on a two-byte word, the initial address must

always be even. Data is written to the 16-bit flash memory

bus after the odd word is written.

In SFM mode, the MPU is completely halted. The

71M6545T/HT must be reset by the WD timer or by the

RESET pin in order to exit SFM mode.

If the SPI port is used for code updates (in lieu of a

programmer that uses the ICE port), then a code that

disables the flash access through SPI can potentially lock

out flash program updates.

Hardware Watchdog Timer

An independent, robust, fixed-duration, watchdog timer

(WDT) is included in the 71M6545T/HT. It uses the RTC

crystal oscillator as its time base and must be refreshed

by the MPU firmware at least every 1.5 seconds. When

not refreshed on time, the WDT overflows and the part is

reset as if the RESET pin were pulled high, except that

the I/O RAM bits are in the same state as after a wake-up

from SLP or LCD modes. After 4100 CK32 cycles (or 125

ms) following the WDT overflow, the MPU is launched

from program address 0x0000.

The watchdog timer is also reset when the internal signal

WAKE = 0.

Test Ports

Two independent multiplexers allow the selection of

internal analog and digital signals for the TMUXOUT and

TMUX2OUT pins (Table 10).

The TMUXOUT and TMUX2OUT pins may be used for

diagnostics purposes during the product development

cycle or in the production test. The RTC 1-second output

may be used to calibrate the crystal oscillator. The RTC

4-second output provides higher precision for RTC cali-

bration. RTCLK may also be used to calibrate the RTC.

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