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AM2432BSDFHIALVR bảng dữ liệu(PDF) 85 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  AM243x Sitara??Microcontrollers
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AM2432BSDFHIALVR bảng dữ liệu(HTML) 85 Page - Texas Instruments

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Table 6-64. PRU_ICSSG0 Signal Descriptions (continued)
Signal Name [1]
Signal Type [2]
Description [3]
ALV PIN [4]
ALX PIN [4]
PRG0_RGMII1_TD1
O
PRU_ICSSG0 RGMII Transmit Data
AA3
K1
PRG0_RGMII1_TD2
O
PRU_ICSSG0 RGMII Transmit Data
R6
N1
PRG0_RGMII1_TD3
O
PRU_ICSSG0 RGMII Transmit Data
V4
N2
PRG0_RGMII2_RD0
I
PRU_ICSSG0 RGMII Receive Data
Y2
L5
PRG0_RGMII2_RD1
I
PRU_ICSSG0 RGMII Receive Data
W2
J2
PRG0_RGMII2_RD2
I
PRU_ICSSG0 RGMII Receive Data
V3
M2
PRG0_RGMII2_RD3
I
PRU_ICSSG0 RGMII Receive Data
T4
L2
PRG0_RGMII2_TD0
O
PRU_ICSSG0 RGMII Transmit Data
W4
P1
PRG0_RGMII2_TD1
O
PRU_ICSSG0 RGMII Transmit Data
Y4
P2
PRG0_RGMII2_TD2
O
PRU_ICSSG0 RGMII Transmit Data
T6
T4
PRG0_RGMII2_TD3
O
PRU_ICSSG0 RGMII Transmit Data
U6
R5
PRG0_UART0_CTSn
I
PRU_ICSSG0 UART Clear to Send (active low)
W6
Y3
PRG0_UART0_RTSn
O
PRU_ICSSG0 UART Request to Send (active low)
AA5
U1
PRG0_UART0_RXD
I
PRU_ICSSG0 UART Receive Data
Y5
R2
PRG0_UART0_TXD
O
PRU_ICSSG0 UART Transmit Data
V6
U2
Table 6-65. PRU_ICSSG1 Signal Descriptions
Signal Name [1]
Signal Type [2]
Description [3]
ALV PIN [4]
ALX PIN [4]
PRG1_ECAP0_IN_APWM_OUT
IO
PRU_ICSSG1 Enhanced Capture (ECAP) Input or
Auxiliary PWM (APWM) Ouput
V12
AA13
PRG1_ECAP0_SYNC_IN
I
PRU_ICSSG1 ECAP Sync Input
Y13
Y15
PRG1_ECAP0_SYNC_OUT
O
PRU_ICSSG1 ECAP Sync Output
AA14
AA14
PRG1_IEP0_EDIO_OUTVALID (1)
O
PRU_ICSSG1 Industrial Ethernet Digital I/O Outvalid
D14
PRG1_IEP0_EDC_LATCH_IN0
I
PRU_ICSSG1 Industrial Ethernet Distributed Clock Latch
Input
V7
Y4
PRG1_IEP0_EDC_LATCH_IN1
I
PRU_ICSSG1 Industrial Ethernet Distributed Clock Latch
Input
U13
V13
PRG1_IEP0_EDC_SYNC_OUT0
O
PRU_ICSSG1 Industrial Ethernet Distributed Clock Sync
Output
W7
U3
PRG1_IEP0_EDC_SYNC_OUT1
O
PRU_ICSSG1 Industrial Ethernet Distributed Clock Sync
Output
U7
T2
PRG1_IEP0_EDIO_DATA_IN_OU
T28
IO
PRU_ICSSG1 Industrial Ethernet Digital I/O Data Input/
Output
U15
W16
PRG1_IEP0_EDIO_DATA_IN_OU
T29
IO
PRU_ICSSG1 Industrial Ethernet Digital I/O Data Input/
Output
U14
W13
PRG1_IEP0_EDIO_DATA_IN_OU
T30
IO
PRU_ICSSG1 Industrial Ethernet Digital I/O Data Input/
Output
V14
Y16
PRG1_IEP0_EDIO_DATA_IN_OU
T31
IO
PRU_ICSSG1 Industrial Ethernet Digital I/O Data Input/
Output
W14
U13
PRG1_IEP1_EDC_LATCH_IN0
I
PRU_ICSSG1 Industrial Ethernet Distributed Clock Latch
Input
Y13
Y15
PRG1_IEP1_EDC_LATCH_IN1
I
PRU_ICSSG1 Industrial Ethernet Distributed Clock Latch
Input
V15
Y14
PRG1_IEP1_EDC_SYNC_OUT0
O
PRU_ICSSG1 Industrial Ethernet Distributed Clock Sync
Output
V12
AA13
PRG1_IEP1_EDC_SYNC_OUT1
O
PRU_ICSSG1 Industrial Ethernet Distributed Clock Sync
Output
AA14
AA14
PRG1_MDIO0_MDC
O
PRU_ICSSG1 MDIO Clock
Y6
W1
PRG1_MDIO0_MDIO
IO
PRU_ICSSG1 MDIO Data
AA6
V2
PRG1_PRU0_GPI0
I
PRU_ICSSG1 PRU Data Input
Y7
V4
PRG1_PRU0_GPI1
I
PRU_ICSSG1 PRU Data Input
U8
W5
PRG1_PRU0_GPI2
I
PRU_ICSSG1 PRU Data Input
W8
AA4
PRG1_PRU0_GPI3
I
PRU_ICSSG1 PRU Data Input
V8
Y5
PRG1_PRU0_GPI4
I
PRU_ICSSG1 PRU Data Input
Y8
AA5
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AM2434, AM2432, AM2431
SPRSP65C – APRIL 2021 – REVISED MARCH 2022
Copyright © 2022 Texas Instruments Incorporated
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