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ST25R3911B bảng dữ liệu(PDF) 19 Page - STMicroelectronics |
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ST25R3911B bảng dữ liệu(HTML) 19 Page - STMicroelectronics |
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19 / 116 page ![]() Power-down support block In the Power-down mode the regulators are disabled in order to save current. In this mode a low power power ‑down support block that maintains the VSP_D and VSP_A in below 3.6 V is enabled. Typical regulated voltage in this mode is 3.1 V at 5 V supply and 2.2 V at 3 V supply. When 3.3 V supply mode is set the Power- down support block is disabled, its output is connected to VDD through 1 kΩ resistor. Typical consumption of Power-down support block is 600 nA at 5 V supply. Measurement of supply voltages Using direct command Measure Power Supply it is possible to measure VDD and regulated voltages VSP_A, VSP_D, and VSP_RF. 1.2.12 Communication with an external microcontroller The ST25R3911B is a slave device and the external microcontroller initiates all communication. Communication is performed by a 4-wire Serial Peripheral Interface (SPI). The ST25R3911B sends an interrupt request (pin IRQ) to the microcontroller, which can use clock signal available on pin MCU_CLK when the oscillator is running. Serial Peripheral Interface (SPI) While signal /SS is high the SPI interface is in reset, while it is low the SPI is enabled. It is recommended to keep /SS high whenever the SPI is not in use. MOSI is sampled at the falling edge of SCLK. All communication is done in blocks of 8 bits (bytes). First two bits of first byte transmitted after high to low transition of /SS define SPI operation mode. Table 5. Serial data interface (4-wire interface) signal lines Name Signal Signal level Description /SS Digital input CMOS SPI Enable (active low) MOSI Digital input Serial data input MISO Digital output with tristate Serial data output SCLK Digital input Clock for serial communication MSB bit is always transmitted first (valid for address and data). Read and Write modes support address auto-incrementing. This means that if some additional data bytes are sent/read after the address and first data byte, they are written to/read from addresses incremented by ‘1’. Figure 9 defines possible modes. ST25R3911B Application information DS11793 - Rev 6 page 19/116 |
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