STM32WB35CC datasheet(38/193 Pages) STMICROELECTRONICS

38 / 193 page

Stop 2

LPR

OFF

LSE,

LSI

RF, BOR, PVD, PVM

RTC, LCD, IWDG

COMPx (x=1, 2)

LPUART1(8)

I2C3(9)

LPTIM1

All other peripherals are frozen.

Reset pin, all I/Os

RF, BOR, PVD, PVM

RTC, LCD, IWDG

COMPx (x=1, 2)

LPUART1

I2C3

LPTIM1

1.85 µA w/o RTC

2.1 µA w RTC

5.71 µs

Standby

LPR

OFF

SRAM2a

ON(10)

LSE,

LSI

RF, BOR, RTC, IWDG

All other peripherals are

powered off.

I/O configuration can be floating,

pull-up or pull-down

RF, Reset pin

5 I/Os (WKUPx)(11)

BOR, RTC, IWDG

0.32 µA w/o RTC

0.60 µA w RTC

51 µs

OFF

0.11 µA w/o RTC

0.390 µA w RTC

Shutdown

OFF

LSE

RTC

All other peripherals are

powered off.

I/O configuration can be floating,

pull-up or pull-down(12)

5 I/Os (WKUPx)(11),

RTC

0.028 µA w/o RTC

0.315 µA w/ RTC

1. Available peripherals depend upon package, STM32WB35xx features one SPI, no LCD, no TSC and two wakeup pins. See Table 2: STM32WB55xx and STM32WB35xx

devices features and peripheral counts for more details.

2. Typical current at VDD = 1.8 V, 25 °C. for STOPx, SHUTDOWN and Standby, else VDD = 3.3 V, 25 °C.

3. The Flash memory controller can be placed in power-down mode if the RF subsystem is not in use and all the program is run from the SRAM.

4. Flash memory programming is only possible in Range 2 voltage.

5. The SRAM1 and SRAM2 clocks can be gated off independently.

6. HSE (32 MHz) automatically used when RF activity is needed by the RF subsystem.

7. HSI16 (16 MHz) automatically used by some peripherals.

8. U(S)ART and LPUART reception is functional in Stop mode, and generates a wakeup interrupt on Start, Address match or Received frame event.

9. I2C address detection is functional in Stop mode, and generates a wakeup interrupt in case of address match.

10. SRAM1 and SRAM2b are OFF.

11. I/Os with wakeup from Standby/Shutdown capability: PA0, PC13, PC12, PA2, PC5.

12. I/Os can be configured with internal pull-up, pull-down or floating but the configuration is lost immediately when exiting the Shutdown mode.

Table 8. STM32WB55xx and STM32WB35xx modes overview (continued)

Mode

Regulator

CPU1

Flash

SRAM

Clocks

DMA and peripherals(1)

Wakeup source

Consumption(2)

Wakeup time

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