PC8374L datasheet(138/239 Pages) NSC

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8.0 Health Management (HM) (Continued)

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138

Revision1.1

8.2.9

Event Notification

Event Notiﬁcation for SMBus Access

The Status Registers 1-3 (see Section 8.5.23 on page 164) contain status bits for the following events:

• Device 1 (LM96011 or LM96010 or LM96012) communication error (DEV1_Fault)

• Device 2 (LM95010) communication error (DEV2_Fault)

• Device 1 (LM96011 or LM96010 or LM96012) Remote Diode fault (RD_Fault)

• Fan failure for the four tachometer inputs (FAN4_STALL-FAN1_STALL)

• Temperature above the critical limit for the three temperature zones (CRIT3_ERR-CRIT1_ERR)

• Temperature outside the low or high limit for the three temperature zones (ZONE3_ERR-ZONE1_ERR)

• Voltage outside the low or high limit for the ﬁve voltage channels (5V_ERR, 3.3V_ERR, Vccp_ERR, 2.5V_ERR,

12V_ERR)

When a status bit is set, updated it is disabled, thus preserving its value until the corresponding status register is read via

the SMBus. Reading the register re-enables status bit updating with the current event state.

Figure 35. Event Notiﬁcation for SMBus

Event Notiﬁcation for LPC Access

The HM Interrupt Status Registers 1-3 (see Section 8.4.4 on page 143) contains event status bits for the following events:

• Device 1 (LM96011 or LM96010 or LM96012) communication changes state between working and not-working

(DEV1_EV).

• Device 2 (LM95010) communication changes state between working and not-working (DEV2_EV).

• Device 1 (LM96011 or LM96010 or LM96012) Remote Diode fault changes state between no-fault and fault (RD_EV).

• Tachometer inputs change state between fans running and failed (FAN4_EV-FAN1_EV).

• Temperature zones change state between below and above the critical limit (CRIT3_EV-CRIT1_EV).

• Temperature zones change state between working within limits and exceeding limits (ZONE3_EV-ZONE1_EV).

• Voltage channels change state between working within limits and exceeding limits (5V_EV, 3.3V_EV, Vccp_EV,

2.5V_EVR, 12V_EV).

Note that whenever a state changes these LPC event status bits are set.

These bits can generate an IRQ to the host if the corresponding enable bits are set in the HM Interrupt Enable Registers 1-

3 (see Section 8.4.6 on page 145). The HM Interrupt Enable Registers 1-3 are reset by a VDD Power-Up reset, a Hardware

reset or a Software reset.

The actual state of each event is held by the corresponding bits in the HM Sensor Status Registers 1-3 (see Section 8.4.8

on page 147).

SCI and SMI Event Routing

All the event status bits in the HMINT_STS1-3 registers (see Section 8.4.4 on page 143) can be divided into two different

groups, based on the severity that each status represents:

• Limit Events: 2.5V_EV, Vccp_EV, 3.3V_EV, 5V_EV, ZONE1_EV, ZONE2_EV and ZONE3_EV of HMINT_STS1 regis-

ter, 12V_EV of HMINT_STS2 register.

• Critical Events: FAN1-4_EV, RD_EV, DEV1_EV, DEV2_EV of HMINT_STS2 register, CRIT1-3_EV of HMINT_STS3

Each of these groups can be routed independently, via the control bits of the Events to SMI/SCI Routing register (see

Section 8.4.16 on page 152), to generate an SCI (SIOPME) interrupt or an SMI interrupt. The enable bits in the HM SMI/SCI

Enable Register 1-3 (see Section 8.4.13 on page 150) enable SMI/SCI generation based on the value of the corresponding

event status bit. The SMI and SCI are generated via the SWC module.

SMBus

Interface

Status

From Other Status Bits

Event State

Disable

SMBus

Event

Bit

Update

Control

Enable

Read Register

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