PC8374L datasheet(103/239 Pages) NSC

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4.0 System Wake-Up Control (SWC) (Continued)

Revision 1.1

103

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4.4.7

General-Purpose Status 1 Register 3 (GPE1_STS_3)

This register contains “child” events 24-31 of the GPE1_STS register.

The status bits behave according to the Sticky Status Bit definition in the ACPI Specification (i.e., the bit is set when the level

of the hardware signal is high and is only cleared by the software writing 1 to it).

Power Well: VSB3

Location:

Offset 0Bh

Type:

R/W1C

RI2_EVT_STS (RI2 Event Status). Indicates that a telephone ring signal was received at Serial Port 2 and the

event was identiﬁed by the RI Wake-Up Detector. The bit is set by a high-to-low transition at the RI2 pin (see

Section 4.2.1 on page 82). Writing 1 clears this bit; writing 0 is ignored.

0: Inactive since last cleared (default)

1: A telephone ring signal was received at Serial Port 2

Reserved.

Bit

76543210

Name

Reserved

HM_STS

MOD_IRQ

_STS

MS_IRQ

_STS

KBD_IRQ

_STS

Reserved

Reset

00000000

Bit

Description

7-6

Reserved.

HM_STS (HM Alarm Status). Is set if an event enabled for SCI generation was detected by the Health

Management module.

For the list of events and routing to SWC module (to the HM_STS bit) see “SCI and SMI Events Routing” in the

“Events Notiﬁcation” section.

Writing 1 clears this bit; writing 0 is ignored.

0: Inactive since last cleared (default)

1: An enabled event was detected by the Health Management module

MOD_IRQ_STS (Modules IRQ Event Status). Indicates that an IRQ was generated by one of the Legacy

modules (FDC, Parallel Port, Serial Ports 1 and 2, InfraRed Port), or Health Management module. The bit is set

only if the IRQ is enabled for wake-up (bit 4 of the Standard conﬁguration register at index 70h) and the related

module is active; see Section 3.2.3 on page 39. Writing 1 clears this bit; writing 0 is ignored.

0: Inactive since last cleared (default)

1: An enabled IRQ (from one of the Legacy or Health Management modules) is active

MS_IRQ_STS (Mouse IRQ Event Status). Indicates that an IRQ was generated by the mouse interface section

of the KBC module. The bit is set only if the IRQ is enabled for wake-up (bit 4 of the Mouse Logical Device

conﬁguration register at index 70h) and the KBC module is active (see Section 3.2.3 on page 39). Writing 1

clears this bit; writing 0 is ignored.

0: Inactive since last cleared (default)

1: An enabled IRQ from the mouse interface section of the KBC module is active

KBD_IRQ_STS (Keyboard IRQ Event Status). Indicates that an IRQ was generated by the keyboard interface

section of the KBC module. The bit is set only if the IRQ is enabled for wake-up (bit 4 of the Keyboard Logical

Device conﬁguration register at index 70h) and the KBC module is active (see Section 3.2.3 on page 39).

Writing 1 clears this bit; writing 0 is ignored.

0: Inactive since last cleared (default)

1: An enabled IRQ from the keyboard interface section of the KBC module is active

1-0

Reserved.

Bit

Description

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