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STM32H750VB bảng dữ liệu(PDF) 136 Page - STMicroelectronics

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STM32H750VB bảng dữ liệu(HTML) 136 Page - STMicroelectronics

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Electrical characteristics (rev Y)
STM32H750VB STM32H750ZB STM32H750IB STM32H750XB
136/334
DS12556 Rev 5
6.3.16
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, RPU (see Table 58: I/O static characteristics).
Unless otherwise specified, the parameters given in Table 63 are derived from tests
performed under the ambient temperature and VDD supply voltage conditions summarized
in Table 22: General operating conditions.
Figure 19. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 58. Otherwise the reset is not taken into account by the device.
Table 63. NRST pin characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RPU(2)
Weak pull-up equivalent
resistor(1)
1. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution
to the series resistance must be minimum
(~10% order)
.
VIN = VSS
30
40
50
?
VF(NRST)(2)
2. Guaranteed by design.
NRST Input filtered pulse
1.71 V < VDD < 3.6 V
-
-
50
ns
VNF(NRST)(2) NRST Input not filtered pulse
1.71 V < VDD < 3.6 V
300
-
-
1.62 V < VDD < 3.6 V
1000
-
-
ai14132d
STM32
RPU
NRST(2)
VDD
Filter
Internal Reset
0.1 μF
External
reset circuit (1)



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