MMPF0100 datasheet(84/136 Pages) NXP

tên linh kiện	MMPF0100

Giải thích chi tiết về linh kiện	14 channel configurable power management integrated circuit

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NXP Semiconductors

PF0100

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

6.4.6.4

External components

Table 101 lists the typical component values for the general purpose LDO regulators.

Table 99. Register VGEN5CTL - ADDR 0x70

Name

Bit #

R/W

Default

Description

VGEN5

3:0

R/W

0x80

Sets VGEN5 output voltage.

See Table 93 for all possible configurations.

VGEN5EN

–

0x00

Enables or disables VGEN5 output

• 0 = OFF

• 1 = ON

VGEN5STBY

R/W

0x00

Set VGEN5 output state when in standby. Refer

to Table 94.

VGEN5LPWR

R/W

0x00

Enable low-power mode for VGEN5. Refer to

Table 94.

UNUSED

–

0x00

unused

Table 100. Register VGEN6CTL - ADDR 0x71

Name

Bit #

R/W

Default

Description

VGEN6

3:0

R/W

0x80

Sets VGEN6 output voltage.

See Table 93 for all possible configurations.

VGEN6EN

–

0x00

Enables or disables VGEN6 output

• 0 = OFF

• 1 = ON

VGEN6STBY

R/W

0x00

Set VGEN6 output state when in standby. Refer

to Table 94.

VGEN6LPWR

R/W

0x00

Enable low-power mode for VGEN6. Refer to

Table 94.

UNUSED

–

0x00

unused

Table 101. LDO external components

Regulator

Output capacitor (

μF)(65)

VGEN1

2.2

VGEN2

4.7

VGEN3

2.2

VGEN4

4.7

VGEN5

2.2

VGEN6

2.2

Notes

65.

Use X5R/X7R ceramic capacitors.

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