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MMPF0100 bảng dữ liệu(PDF) 43 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  14 channel configurable power management integrated circuit
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MMPF0100 bảng dữ liệu(HTML) 43 Page - NXP Semiconductors

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PF0100
FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS
Table 42 provides a list of registers used to configure and operate SW1A/B/C and a detailed description on each one of these register is
provided in Table 43 through Table 52.
Table 42. SW1A/B/C register summary
Register
Address
Output
SW1ABVOLT
0x20
SW1AB output voltage set point in normal operation
SW1ABSTBY
0x21
SW1AB output voltage set point on standby
SW1ABOFF
0x22
SW1AB output voltage set point on sleep
SW1ABMODE
0x23
SW1AB switching mode selector register
SW1ABCONF
0x24
SW1AB DVS, phase, frequency and ILIM configuration
SW1CVOLT
0x2E
SW1C output voltage set point in normal operation
SW1CSTBY
0x2F
SW1C output voltage set point in standby
SW1COFF
0x30
SW1C output voltage set point in sleep
SW1CMODE
0x31
SW1C switching mode selector register
SW1CCONF
0x32
SW1C DVS, phase, frequency and ILIM configuration
Table 43. Register SW1ABVOLT - ADDR 0x20
Name
Bit #
R/W
Default
Description
SW1AB
5:0
R/W
0x00
Sets the SW1AB output voltage during normal
operation mode. See Table 41 for all possible
configurations.
UNUSED
7:6
–
0x00
unused
Table 44. Register SW1ABSTBY - ADDR 0x21
Name
Bit #
R/W
Default
Description
SW1ABSTBY
5:0
R/W
0x00
Sets the SW1AB output voltage during standby
mode. See Table 41 for all possible
configurations.
UNUSED
7:6
–
0x00
unused
Table 45. Register SW1ABOFF - ADDR 0x22
Name
Bit #
R/W
Default
Description
SW1ABOFF
5:0
R/W
0x00
Sets the SW1AB output voltage during sleep
mode. See Table 41 for all possible
configurations.
UNUSED
7:6
–
0x00
unused



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