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AS5050A bảng dữ liệu(PDF) 19 Page - ams AG

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AS5050A bảng dữ liệu(HTML) 19 Page - ams AG

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ams Datasheet
Page 19
[v2-06] 2014-Oct-14
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AS5050A − Registers
The on-chip registers are shown in Figure 22.
Figure 22:
Registers
POR OFF (0x3F22)
Writing the value 0x5A to the POR OFF Register (0x3F22)
deactivates the POR cell and reduces the current consumption
in low power mode (IOFF).
Software Reset (0x3C00)
Writing to the Software Reset Register initiates a Software
Reset. With the RES SPI bit of the Data Package set to 1 it is
possible to reset the SPI registers. After a software reset a new
angle conversion is started; this is needed to set the AS5050A
into an initial state. This angle is not readable by the
microcontroller.
The AS5050A is ready as soon as INT/ is driven low or a minimum
time (treadout) has elapsed.
Figure 23:
Software Reset Command
Name
Address
Bits
Mod
Default
Description
POR OFF
0x3F22
7:0
R/W
0x0000
Power On Reset OFF
Software Reset
0x3C00
13:0
W
0x0000
Software Reset
Master Reset
0x33A5
13:0
W
0x0000
Master Reset
Clear EF
0x3380
13:0
R
0x0000
Clear Error Flag
NOP
0x0000
13:0
W
0x0000
No Operation
AGC
0x3FF8
5:0
R/W
0x0020
Automatic Gain Control
Angular Data
0x3FFF
13:0
R
0x0000
Measured Angle
Error Status
0x335A
13:0
R
0x0000
Error Status Register
System Config
0x3F20
9:13
R/W
0x000
System Configuration Register 1
Bit
15
14
13
12
11
10
98765
4
3
2
1
0
Content
0
1
1
1
1
0
0
0
0
0
0
0
00
0PAR
Registers



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