PIC16F684-ESLASHST datasheet(83/164 Pages) MICROCHIP

83 / 164 page

 2004 Microchip Technology Inc.

Preliminary

DS41202C-page 81

PIC16F684

11.3.4

HALF-BRIDGE MODE

In the Half-bridge Output mode, two pins are used as

outputs to drive push-pull loads. The PWM output sig-

nal is output on the RC5/CCP1/P1A pin, while the com-

plementary PWM output signal is output on the

RC4/C2OUT/P1B pin (Figure 11-6). This mode can be

used

for

half-bridge

applications,

shown

Figure 11-7, or for full-bridge applications, where four

power switches are being modulated with two PWM

signals.

In Half-bridge Output mode, the programmable dead

band delay can be used to prevent shoot-through

current in half-bridge power devices. The value of bits

PDC<6:0> (PWM1CON<6:0>) sets the number of

instruction cycles before the output is driven active. If

the value is greater than the duty cycle, the corre-

sponding output remains inactive during the entire

cycle. See Section 11.3.6 “Programmable Dead

Band Delay” for more details of the dead band delay

operations.

Since the P1A and P1B outputs are multiplexed with

the PORTC<5:4> data latches, the TRISC<5:4> bits

must be cleared to configure P1A and P1B as outputs.

FIGURE 11-6:

HALF-BRIDGE PWM

OUTPUT

FIGURE 11-7:

EXAMPLES OF HALF-BRIDGE APPLICATIONS

Period

Duty Cycle

(1)

P1A(2)

P1B(2)

td = Dead Band Delay

Period

(1)

Note 1:

At this time, the TMR2 register is equal to the

PR2 register.

Output signals are shown as active-high.

PIC16F684

P1A

P1B

FET

Driver

FET

Driver

V+

V-

Load

FET

Driver

FET

Driver

V+

V-

Load

FET

Driver

FET

Driver

PIC16F684

P1A

P1B

Standard Half-bridge Circuit (“Push-Pull”)

Half-bridge Output Driving a Full-bridge Circuit

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