AT25SF321 datasheet(33/48 Pages) DIALOG

33 / 48 page

AT25SF321

DS-25SF321–047F–8/2017

Figure 11-2. Read ID (Legacy Command)

11.3 Deep Power-Down (B9h)

During normal operation, the device will be placed in the standby mode to consume less power as long as the CS pin

remains deasserted and no internal operation is in progress. The Deep Power-Down command offers the ability to place

the device into an even lower power consumption state called the Deep Power-Down mode.

When the device is in the Deep Power-Down mode, all commands including the Read Status Register command will be

ignored with the exception of the Resume from Deep Power-Down command. Since all commands will be ignored, the

mode can be used as an extra protection mechanism against program and erase operations.

Entering the Deep Power-Down mode is accomplished by simply asserting the CS pin, clocking in the opcode of B9h,

and then deasserting the CS pin. Any additional data clocked into the device after the opcode will be ignored. When the

CS pin is deasserted, the device will enter the Deep Power-Down mode within the maximum time of tEDPD.

The complete opcode must be clocked in before the CS pin is deasserted, and the CS pin must be deasserted on an byte

boundary (multiples of eight bits); otherwise, the device will abort the operation and return to the standby mode once the

CS pin is deasserted. In addition, the device will default to the standby mode after a power-cycle.

The Deep Power-Down command will be ignored if an internally self-timed operation such as a program or erase cycle is

in progress. The Deep Power-Down command must be reissued after the internally self-timed operation has been

completed in order for the device to enter the Deep Power-Down mode.

Figure 11-3. Deep Power-Down

MSB

OPCODE

GH-

MPEDANCE

31 32

38 39

35 36

XXX

MSB

DDDD

AT25SF321 bảng dữ liệu(PDF) 33 Page - Dialog Semiconductor