PD69210 datasheet(10/21 Pages) MICROCHIP

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PD69210

PD69220

Designation

Type

Description

xI2C_MESSAGE_READY

OUT

I2C message ready for reading by the host.

Controller asserts this line low when it has an

answer to the host. Therefore, the host can poll

this line and initiate I2C read cycle only when

the message is ready. After the host reads the

data from the controller, this pin is asserted to

high. (Active Low)

xINT_OUT

OUT

Interrupt output indication. This line is asserted

low when a pre-configured event is in progress.

(Active Low)

xRESET

IN/OUT

Host Reset input (Active Low). Controller can

generate self-reset. In this case, the xRESET

pin is driven low by the controller for 100 µs.

See AN3361 for pin connection requirements.

xLED_LATCH2

OUT

Latch signal for LED stream. (Active Low)

VSSD

GND

Ground.

VDD_CORE

Power

1.2 V core voltage connect 1 μF capacitor to

VSSD.

VDD

Supply

Main 3.3 V supply.

SWD_CLK

PD69210 use a 1 kΩ pull-up to 3.3 V.

PD69220 leave open or use 1k pull-up.

SWD_DIO

Leave open.

ePAD

Connect to VSSA. Must have sufficient copper

mass to ensure adequate thermal performance.

PD69210/PD69220

Pins

Datasheet

DS00003424A-page 10

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