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PD69210 bảng dữ liệu(PDF) 9 Page - Microchip Technology

tên linh kiện PD69210
Giải thích chi tiết về linh kiện  PoE PSE Controller Datasheet
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PD69210 bảng dữ liệu(HTML) 9 Page - Microchip Technology

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PD69210
Pin
PD69220
Pin
Designation
Type
Description
6
4
ESPI_SCK
OUT
ESPI bus to PoE manager. SPI clock output to
PD6920x, and LED stream clock output, set to
1 MHz.
7
3
ESPI_xCS
OUT
ESPI bus to PoE manager. SPI chip select.
Pull-up required. See AN3361 for pin
connection requirements. (Active Low)
8
5
ESPI_MOSI
OUT
ESPI bus from PoE manager. SPI master out,
slave in. SPI packets are received on this line.
9
7
VDDA
Supply
Main Supply 3.3 V.
10
8
VSSA
GND
Ground.
11
14
Reserved
Analog_IN Reserved Analog_IN. Connect to 3.3 V or GND
through 10 kΩ.
-
9, 29
Reserved
Analog_IN Reserved Analog_IN. Connect to 3.3 V.
12, 19
-
Reserved
Reserved. Leave open.
13
22
I2C_ADDR_MEAS
Analog_IN Analog input to determine I2C address or UART
operation.
14
23
Reserved
Connect to GND.
15
12
UART0_TX
OUT
UART transmit to host. 15-byte protocol reply/
telemetry is transmitted on this line. The baud
rate is set to 19,200 bps.
16
11
UART0_RX
IN
UART receive from a host. 15-byte protocol
commands are received on this line. The baud
rate is set to 19,200 bps. Pull-up is required.
See AN3361 for details.
17
18
Reserved
Oscillator
Reserved. Oscillator output. Leave open.
17
Reserved
Oscillator
Reserved. Oscillator output. Leave open.
18
28
xLED_OE
OUT
Output enable signal for the LED stream.
(Active Low)
20
30
FAN_CONTROL
OUT
Logic out that may be used to control a fan
driver. (Active High)
21
21
I2C0_SDA
IN/OUT
I2C bidirectional data. 15-byte protocol
messages are transmitted on this line. Pull-up
required, see AN3361 for details.
22
20
I2C0_SCL
IN/OUT
I2C clock from the host master. Speed is limited
to 400 KHz. Clock stretch required. Pull-up
required, see AN3361 for details.
23
26
xLED_CS
OUT
Chip select signal for LED stream. (Active Low)
PD69210/PD69220
Pins
© 2020 Microchip Technology Inc.
Datasheet
DS00003424A-page 9



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