MPF7100BVMA2ES datasheet(17/125 Pages) NXP

17 / 125 page

NXP Semiconductors

PF7100

7-channel power management integrated circuit for high performance applications

PF7100

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 4 — 9 March 2021

17 / 125

If a power up event is started and any of the TRIM_NOK, OTP_NOK or STEST_NOK

flags are asserted, the device ignores the power up event and remains in the QPU_Off

state. See Section 17 "OTP/TBB and hardwire default configurations" for more details on

debugging a fuse loading failure.

Upon a power up event, the default configuration from OTP or hardwire is loaded into

their corresponding I2C functional register in the transition from QPU_Off to power up

state.

13.1.5 Power up sequence

During the power up sequence, the external regulators are turned on in a predefined

order as programmed by the default (OTP or hardwire) sequence.

If PGOOD is used as a GPO, it can also be set high as part of the power up sequence in

order to allow sequencing of any external supply/device controlled by the PGOOD pin.

The RESETBMCU is also programmed as part of the power up sequence, and it is used

as the condition to enter the system-on states. The RESETBMCU may be released in

the middle of the power up sequence, in this case, the remaining supplies in the power

up continue to power up as the device is in the run state. See Section 14.5.2 "Power up

sequencing" for details.

13.1.6 System-on states

During the system-on state, the MCU is powered and out of reset and the system is fully

operational.

The system-on is a virtual state composed by two modes of operations:

• Run state

• Standby state

other miscellaneous functions can be written to or read from the functional I2C register

map during the system-on states.

13.1.6.1 Run state

If the power up state is successfully completed, the state machine transitions to the run

state. In this state, RESETBMCU is released high, and the MCU is expected to boot up

and set up specific registers on the PMIC as required during the system boot up process.

The run mode is intended to be used as the normal mode of operation for the system.

Each regulator has specific registers to control its output voltage, operation mode and/or

enable/disable state during the run state.

By default, the VSWx_RUN[7:0] / VLDOx_RUN[3:0] registers are loaded with the data

stored in the OTP_VSWx[7:0] or OTP_VLDOx[3:0] bits respectively.

SW5 uses only one global register to configure the output voltage during run or

standby mode. Upon power up, the VSW5[4:0] bits are loaded with the values of the

OTP_VSW5[4:0].

Upon power up, if the switching regulator is part of the power up sequence, the

SWx_RUN_MODE[1:0] bits are loaded as needed by the system:

MPF7100BVMA2ES bảng dữ liệu(PDF) 17 Page - NXP Semiconductors

MPF7100BVMA2ES bảng dữ liệu(HTML) 17 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL