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M69KB096AA bảng dữ liệu(PDF) 16 Page - STMicroelectronics |
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M69KB096AA bảng dữ liệu(HTML) 16 Page - STMicroelectronics |
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16 / 48 page ![]() M69KB096AA 16/48 Burst Length Bits (BCR2-BCR0). The Burst Length bits set the number of Words to be output during a Synchronous Burst Read operation. They can be set for 4 Words, 8 Words, 16 Words or Continuous Burst (default settings), where all the Words are read sequentially regardless of address boundaries. Burst Write operations are always performed using the Continuous Burst mode. Table 5. Bus Configuration Register Definition Note: All Burst Write operations are performed in Synchronous Continuous Burst mode. Address Bits Bus Configuration Register Bit Description Value Description A21-A20 - - Must be set to ‘0’ Reserved A19 - Register Select 0 Refresh Selected 1 Bus Configuration Register Selected A18-A16 - - Must be set to ‘0’ Reserved A15 BCR15 Operating Mode Bit 0 Synchronous Burst mode 1 Asynchronous mode (default) A14 - - Must be set to ‘0’ Reserved A13-A11 BCR13- BCR11 Latency Counter Bits (LC) 010 LC = 2 (3 Clock Cycles) 011 LC= 3 (4 Clock Cycles) (default) Other configurations reserved A10 BCR10 WAIT Polarity Bit 0 WAIT Active Low 1 WAIT Active High (default) A9 - - Must be set to ‘0’ Reserved A8 BCR8 Wait Configuration Bit 0 WAIT Asserted During Delay 1 WAIT Asserted One Clock Cycle Before Delay (Default) A7 - - Must be set to ‘0’ Reserved A6 BCR6 Clock Configuration Bit 0 Not supported 1 Rising Clock Edge (Default) A5 BCR5 Driver Strength Bit 0 Full Drive (default) 1 1/4 Drive A4 - - Must be set to ‘0’ Reserved A3 BCR3 Burst Wrap Bit 0 Wrap (default) 1 No Wrap A2-A0 BCR2-BCR0 Burst Length Bit 001 4 Words 010 8 Words 011 16 Words 111 Continuous Burst (default) |
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