ACE25QC160GLDPTH datasheet(34/73 Pages) ACE

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ACE25QC160G

16M BIT SPI NOR FLASH

VER 1.2

Octal Word Read Quad I/O (E3h)

The Octal Word Read Quad I/O (E3h) instruction is similar to the Fast Read Quad I/O (EBh) instruction

except that the lower four Address bits (A0, A1, A2, A3) must equal 0. As a result, the dummy clocks are not

required, which further reduces the instruction overhead allowing even faster random access for code

execution (XIP). The Quad Enable bit (QE) of Status Register-2 must be set to enable the Octal Word Read

Quad I/O Instruction.

Octal Word Read Quad I/O with “Continuous Read Mode”

The Octal Word Read Quad I/O instruction can further reduce instruction overhead through setting the

“Continuous Read Mode” bits (M7- 0) after the input Address bits (A23-0), as shown in Figure17.a. The

upper nibble of the (M7-4) controls the length of the next Octal Word Read Quad I/O instruction through the

inclusion or exclusion of the first byte instruction code. The lower nibble bits of the (M3-0) are don’t care

(“x”). However, the IO pins should be high-impedance prior to the falling edge of the first data out clock.

If the “Continuous Read Mode” bits M5-4 = (1,0), then the next Octal Word Read Quad I/O instruction (after

/CS is raised and then lowered) does not require the E3h instruction code, as shown in Figure 17.b. This

reduces the instruction sequence by eight clocks and allows the Read address to be immediately entered

after /CS is asserted low. If the “Continuous Read Mode” bits M5-4 do not equal to (1,0), the next instruction

(after /CS is raised and then lowered) requires the first byte instruction code, thus returning to normal

operation. It is recommended to input FFh on SI for the next instruction (8 clocks), to ensure M4 = 1 and

return the device to normal operation.

Figure17 a. Octal Word Read Quad I/O Instruction (Initial instruction or previous M5-

4 ≠ 10, SPI

Mode only)

Figure17 b. Octal Word Read Quad I/O Instruction (Initial instruction or

previous M5-4 = 10, SPI Mode only)

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