MCP33131 datasheet(39/54 Pages) MICROCHIP

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 2018 Microchip Technology Inc.

DS20006122A-page 39

MCP33131/MCP33121/MCP33111-XX

7.1

Recalibrate Command

The user may use the recalibrate command in the

following cases:

• When the reference voltage was not fully settled

during the first-power sequence.

• During operation, to ensure optimum performance

across varying environment conditions, such as

reference voltage and temperature.

A self-calibration is initiated by sending the recalibrate

command. The host device sends a recalibrate

command by transmitting 1024 SCLK pulses (including

the clocks for data bits) while the device is in the

acquisition phase (Standby).

The device drives SDO low during the recalibration

procedure, and returns to high-Z once completed. The

status of the recalibration procedure can be monitored

by placing a pull-up on SDO, so that SDO goes high

when the recalibration is complete.

Figure 7-3 shows the recalibrate command timing

diagram. The calibration takes approximately 500 ms

(tCAL).

FIGURE 7-3:

Recalibrate Command Timing Diagram.

Note:

When the device performs a self-calibration, it is important to note that both AVDD and the reference

voltage (VREF) must be stabilized for a correct calibration. This is also true when the device is first

powered-up, the reference voltage (VREF) must be stabilized before self-calibration begins. This means

the VREF must be provided prior to supplying AVDD or within about 64 ms after supplying AVDD.

1024 clocks

Start recalibration

tCAL

(SPITM Recalibrate command)

Hi-Z

Note

“Low”

1024

“High” with Pull-up

Hi-Z

ADC Output Data Stream

“High” with Pull-up

2: The 1024 clocks include the clocks for data bits.

tCNV

Complete data reading

Finish recalibration

Device Recalibration

(Note 3)

(Note 2)

1: SDI must remain “High” during the entire recalibration cycle.

(Note 4)

3: SDO outputs “Low” during calibration, and Hi-Z when exiting the calibration.

SDI = DVIO

4: After finishing the recalibration procedure, the device is ready for a new input sampling immediately.

(Note 1)

CNVST

SDO

SCLK

ADC State

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