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MCP33131 bảng dữ liệu(PDF) 3 Page - Microchip Technology

tên linh kiện MCP33131
Giải thích chi tiết về linh kiện  1 Msps/500 kSPS 16/14/12-Bit Single-Ended Input SAR ADC
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 2018 Microchip Technology Inc.
DS20006122A-page 3
MCP33131/MCP33121/MCP33111-XX
1.0
KEY ELECTRICAL
CHARACTERISTICS
1.1
Absolute Maximum Ratings†
External Analog Supply Voltage (AVDD) ................... -0.3V to 2.0V
External Digital Supply Voltage (DVIO) ..................... -0.3V to 5.8V
External Reference Voltage (VREF) .......................... -0.3V to 5.8V
Analog Inputs w.r.t GND .................... .......... –0.3V to VREF+0.3V
Current at Input Pins ...........................................................±2 mA
Current at Output and Supply Pins .................................±250 mA
Storage Temperature ...........................................-65°C to +150°C
Maximum Junction Temperature (TJ) ................................+150°C
ESD protection on all pins .... ≤2kV HBM, ≤2kV CDM, ≤200V MM
†Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability
.
1.2
Electrical Specifications
TABLE 1-1:
KEY ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all parameters apply for TA = -40°C to +125°C, AVDD = 1.8V, DVIO = 3.3V, VREF =5V,
GND = 0V, Analog Input (VIN) = -1 dBFS sine wave, fIN =10 kHz, CLOAD_SDO = 20 pF.
• MCP331x1-10: Sample Rate (fS) = 1 Msps, SPI Clock Input (SCLK) = 60 MHz.
• MCP331x1-05: Sample Rate (fS) = 500 kSPS, SPI Clock Input (SCLK) = 30 MHz.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Power Supply Requirements
Analog Supply Voltage Range
AVDD
1.7
1.8
1.9
V
(Note 3)
Digital Input/Output Interface Voltage
Range
DVIO
1.7
—
5.5
V
(Note 3)
Analog Supply Current at AVDD pin:
During Conversion
During Standby
IDDAN
IDDAN_STBY
—
—
—
1.6
1.4
0.8
2.4
2.0
—
mA
mA
µA
fs = 1 Msps (MCP331x1-10)
fs = 500 kSPS (MCP331x1-05)
During input acquisition (tACQ)
Digital Supply Current At DVDD pin:
During Output Data Reading
During Standby
IIO_DATA
IIO_STBY
—
—
—
290
200
30
—
—
—
A
A
nA
fs = 1 Msps (MCP331x1-10)
fs = 500 kSPS (MCP331x1-05)
During input acquisition (tACQ)
External Reference Voltage Input
Reference Voltage
(Note 2), (Note 3)
VREF
2.5
2.7
5.1
5.1
V
-40°C ≤ TA ≤ 85°C
85°C < TA ≤ 125°C
Reference Load Current at VREF pin:
During Conversion
During Standby
IREF
IREF_STBY
—
—
450
220
240
600
360
—
µA
µA
nA
fs = 1 Msps (MCP331x1-10)
fs = 500 kSPS (MCP331x1-05)
During input acquisition (tACQ)
Total Power Consumption (Including AVDD, DVIO, VREF pins)
MCP331x1-10
at 1 Msps
at 500 ksps
at 100 ksps
During Standby
PDISS_TOTAL
PDISS_STBY
—
—
—
—
6.2
3.1
0.6
2.6
—
—
—
—
mW
mW
mW
W
Averaged power for tACQ + tCNV
During input acquisition (tACQ)
MCP331x1-05
at 500 ksps
at 100 ksps
During Standby
PDISS_TOTAL
PDISS_STBY
—
—
—
4.2
0.8
2.6
—
—
—
mW
mW
W
Averaged power for tACQ + tCNV
During input acquisition (tACQ)
Note
1: This parameter is ensured by design and not 100% tested.
2: This parameter is ensured by characterization and not 100% tested.
3: Decoupling capacitor is recommended on the following pins:
(a) AVDD pin: 1 F ceramic capacitor, (b) DVIO pin: 0.1 F ceramic capacitor, (c) VREF pin: 10 F tantalum capacitor.
4: PSRR (dB) = -20 log (DVOUT/AVDD), where DVOUT = change in conversion result.
5: ENOB = (SINAD - 1.76)/6.02



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