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MCP3464 bảng dữ liệu(PDF) 81 Page - Microchip Technology |
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MCP3464 bảng dữ liệu(HTML) 81 Page - Microchip Technology |
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81 / 108 page ![]() 2019-2021 Microchip Technology Inc. DS20006180D-page 81 MCP3461/2/4 8.0 INTERNAL REGISTERS The device has a total of 16 internal registers, which are made of volatile memory. Table 8-1 shows the summary of the registers. These registers are accessible sequentially. TABLE 8-1: INTERNAL REGISTERS SUMMARY Address Register Name No. of Bits R/W Description 0x0 ADCDATA 4/16/32 R Latest A/D conversion data output value (16 or 32 bits depending on DATA_FORMAT[1:0]) or modulator output stream (4-bit wide) in MDAT Output mode. 0x1 CONFIG0 8 R/W ADC Operating mode, Master Clock mode and Input Bias Current Source mode. 0x2 CONFIG1 8 R/W Prescale and OSR settings. 0x3 CONFIG2 8 R/W ADC boost and gain settings, auto-zeroing settings for analog multiplexer, voltage reference and ADC. 0x4 CONFIG3 8 R/W Conversion mode, data and CRC format settings, enable for CRC on communications, enable for digital offset and gain error calibrations. 0x5 IRQ 8 R/W IRQ Status bits and IRQ mode settings, enable for Fast commands and for conversion start pulse. 0x6 MUX 8 R/W Analog multiplexer input selection (MUX mode only). 0x7 SCAN 24 R/W SCAN mode settings. 0x8 TIMER 24 R/W Delay value for TIMER between each SCAN cycle. 0x9 OFFSETCAL 24 R/W ADC digital offset calibration value. 0xA GAINCAL 24 R/W ADC digital gain calibration value. 0xB RESERVED 24 R/W 0xC RESERVED 8 R/W 0xD LOCK 8 R/W Password value for SPI Write mode locking. 0xE RESERVED 16 R/W 0xF CRCCFG 16 R CRC checksum for the device configuration. |
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