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MCP3464 bảng dữ liệu(PDF) 75 Page - Microchip Technology |
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MCP3464 bảng dữ liệu(HTML) 75 Page - Microchip Technology |
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75 / 108 page ![]() 2019-2021 Microchip Technology Inc. DS20006180D-page 75 MCP3461/2/4 6.8.3.3 IRQ Pin State A logic low state is generated on the IRQ pin as soon as the AVDD or DVDD monitoring circuits detect a power supply drop below their specified threshold. This POR interrupt can only be cleared when both AVDD and DVDD are above their monitoring voltage thresholds. When this condition is met, the POR threshold is cleared by the CS falling edge. This means that if a CS falling edge does not clear the IRQ pin state, the POR event is still in effect. This feature can be used by the user to know exactly when the chip has powered up by polling with the CS pin and checking the IRQ pin state at power-up. See Figure 6-16 for more details. Since this is a high-level priority interrupt, this POR interrupt can happen at all times, even when MDAT is enabled. In this case, having a constant logic low bit stream can indicate in this case a probable POR event (or a fully negative ADC saturation output code induced by a large negative input voltage). FIGURE 6-16: POR IRQ Timing Diagram. IRQ High-Z 0 DVDD AVDD tPOR V POR_A, CS Clears POR Interrupt Chip Select Starts Low POR Internal State Don’t Care tCSIRQ V POR_D |
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