PIMXRT516SCVM5A datasheet(16/124 Pages) NXP

16 / 124 page

i.MX RT1160 Crossover Processors Data Sheet for Consumer Products, Rev. 0, 04/2021

NXP Semiconductors

Modules list

MIPI-CSI

MIPI CSI Interface

Multimedia

Peripherals

Key features of MIPI CSI controller are listed as

following:

• Implements all three MIPI CSI-2 layers

• Supports CSI-2 Unidirectional Master operation

• Virtual Channel support

• Flexible pixel-based user interface

MIPI-DSI

MIPI DSI Interface

Multimedia

Peripherals

Key features of MIPI DSI controller are listed as

following:

• Implements all three DSI layers

• Supports Command and Video Modes

• Virtual Channel support

• Flexible packet based user interface

MQS

Medium Quality Sound

Multimedia

Peripherals

MQS is used to generate 2-channel medium quality

PWM-like audio via two standard digital GPIO pins.

Messaging Unit

System Control

The Messaging Unit module enables two processors

within the SoC to communicate and coordinate by

passing messages (e.g. data, status, and control)

through the MU interface.

The MU also provides the ability for one processor to

signal the other processor using interrupts.

OCOTP_CTRL

OTP Controller

Security

The On-Chip OTP controller (OCOTP_CTRL) provides

an interface for reading, programming, and/or overriding

identification and control information stored in on-chip

fuse elements. The module supports electrically

programmable poly fuses (eFUSEs). The

OCOTP_CTRL also provides a set of volatile

software-accessible signals that can be used for

software control of hardware elements, not requiring

non volatility. The OCOTP_CTRL provides the primary

user-visible mechanism for interfacing with on-chip fuse

elements. Among the uses for the fuses are unique chip

identifiers, mask revision numbers, cryptographic keys,

JTAG secure mode, boot characteristics, and various

control signals requiring permanent non volatility.

OCRAM

On-Chip Memory

controller

Memories and

Memory Controllers

The On-Chip Memory controller (OCRAM) module is

designed as an interface between the system’s AXI bus

and the internal (on-chip) SRAM memory module.

OSC

Oscillator

Clock Sources and

Control

Two crystal oscillators:

• 48 MHz crystal oscillator: it is used as primary clock

source for all the PLLs to generate the clock for CPU,

BUS, and high-speed interfaces.

• 32 kHz crystal oscillator: it is the primary clock source

for RTC as well as low speed clock source for

CCM/SRC/GPC.

PDM

Pulse Density Modulation

Multimedia

Peripherals

The PDM supports up to 8-channels (4 lanes) digital

MIC inputs.

Table 3. i.MX RT1160 modules list (continued)

Block Mnemonic

Block Name

Subsystem

Brief Description

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