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FSL518APG bảng dữ liệu(PDF) 16 Page - ON Semiconductor |
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FSL518APG bảng dữ liệu(HTML) 16 Page - ON Semiconductor |
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16 / 27 page ![]() FSL518H, FSL538H, FSL518A, FSL538A www.onsemi.com 16 Figure 37. Soft-start Operation 1.25 ms 8 Steps ILIM Drain Current IDRAIN VCOMP Pull high (5 V) VSS− LIMIT t Main Control Frequency Reduction Operating frequency of switching operation is synchronized with COMP-pin voltage, VCOMP. When VCOMP drops, operating frequency will also decrease. This helps reducing switching losses and thus improve light-load efficiency operation. The operating frequency will not be decreased below 22-kHz so acoustic noise can be avoided. PWM Control The FSL5x8 operates with peak−current mode to regulate output voltage. The duty cycle of PWM is determined by comparing drain peak current and VCOMP. The VCOMP can be controlled by either the input signal of error amplifier or the signal delivered via opto−coupler and feedback loop for output regulation. Slope Compensation Built-in slope compensation is added into the PWM procedure when duty cycle is higher than 45%. It helps to avoid sub-harmonic oscillation of peak-current control. Figure 38. Slope Compensation VSENSE VSENSE+COMP t t t VSLOPE 45 Duty % 45 Duty % Burst−mode Operation As loading of the power converter decreases, VCOMP decreases, thus reducing switching frequency of the oscillator. When minimum operating frequency is reached, to further reduce delivered output power, the device goes into burst−mode. In burst−mode, switching operation is halted when VCOMP is lower than VBURL and resumed when VCOMP is higher than VBURH. By skipping un-needed switching cycles, the FSL5x8 drastically reduced the power wasted during light load conditions. |
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