ADGS1612BCPZ datasheet(25/29 Pages) AD

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Data Sheet

ADGS1612

Rev. 0 | Page 25 of 29

APPLICATIONS INFORMATION

BREAK-BEFORE-MAKE SWITCHING

The ADGS1612 exhibits break-before-make switching action,

which allows the use of the device in multiplexer applications. A

multiplexer can be achieved by externally hardwiring the device

in the mux configuration that is required, as shown in Figure 45.

4 × SPST

4:1 MUX

SCLK SDI

CS RESET/VL

SPI

INTERFACE

1ALL Dx PINS ARE CONNECTED AS ONE DRAIN.

Figure 45. SPI Controlled Switch Configured as a 4:1 Mux

DIGITAL INPUT BUFFERS

There are input buffers present on the digital inputs pins, CS,

SCLK, and SDI. These buffers are active at all times. Therefore,

there is current draw from the VL supply if SCLK or SDI is

toggling, regardless of whether CS is active. For typical values of

this current draw, refer to the Specifications section and Figure 26.

POWER SUPPLY RAILS

To guarantee correct operation of the ADGS1612, 0.1 μF

decoupling capacitors are required.

The ADGS1612 can operate with bipolar supplies between

±3.3 V and ±8 V. The supplies on VDD and VSS do not have to be

symmetrical; however, the VDD to VSS range must not exceed

16 V. The ADGS1612 can also operate with single supplies

between 3.3 V and 16 V with VSS connected to GND.

The voltage range that can be supplied to VL is from 2.7 V to 5.5 V.

The device is fully specified at ±5 V, 12 V, 5 V, and 3.3 V analog

supply voltage ranges.

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