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ADGS1612BCPZ bảng dữ liệu(PDF) 2 Page - Analog Devices

tên linh kiện ADGS1612BCPZ
Giải thích chi tiết về linh kiện  SPI Interface, 1 廓 RON, 짹5 V, 12 V, 5 V, 3.3 V, Mux Configurable, Quad SPST Switch
PDF  29 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
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ADGS1612BCPZ bảng dữ liệu(HTML) 2 Page - Analog Devices

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ADGS1612
Data Sheet
Rev. 0 | Page 2 of 29
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
±5 V Dual Supply ......................................................................... 3
12 V Single Supply........................................................................ 5
5 V Single Supply.......................................................................... 7
3.3 V Single Supply....................................................................... 9
Continuous Current per Channel, Sx or Dx........................... 11
Timing Characteristics .............................................................. 11
Absolute Maximum Ratings.......................................................... 13
Thermal Resistance .................................................................... 13
ESD Caution................................................................................ 13
Pin Configuration and Function Descriptions........................... 14
Typical Performance Characteristics ........................................... 15
Test Circuits..................................................................................... 19
Terminology .................................................................................... 21
Theory of Operation ...................................................................... 22
Address Mode ............................................................................. 22
Error Detection Features ........................................................... 22
Clearing the Error Flags Register ............................................. 23
Burst Mode.................................................................................. 23
Software Reset............................................................................. 23
Daisy-Chain Mode ..................................................................... 23
Power-On Reset.......................................................................... 24
Applications Information .............................................................. 25
Break-Before-Make Switching.................................................. 25
Digital Input Buffers .................................................................. 25
Power Supply Rails ..................................................................... 25
Register Summary .......................................................................... 26
Register Details ............................................................................... 27
Switch Data Register .................................................................. 27
Error Configuration Register.................................................... 27
Error Flags Register.................................................................... 28
Burst Enable Register................................................................. 28
Software Reset Register ............................................................. 28
Outline Dimensions ....................................................................... 29
Ordering Guide .......................................................................... 29
REVISION HISTORY
1/2018—Revision 0: Initial Version



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