| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
ATSAM3308 bảng dữ liệu(PDF) 6 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
ATSAM3308 bảng dữ liệu(HTML) 6 Page - ATMEL Corporation |
|
6 / 24 page ![]() 6 ATSAM3308 6090A–DRMSD–08/04 Pinout Pin Description In the Pin Description table below: • Identical sharing number indicates multifunction pins. • Pd indicates a pin with built-in pull-down resistor. • Pu indicates a pin with built-in pull-up resistor. Table 2. Pinout by Pin Name Pin Name Pin Number Type Sharing Description GND 9, 22, 30, 41, 56, 70, 75, 87, 97 PWR – Digital ground. All of these pins should be returned to a ground plane. VC18 20, 47, 73, 99 PWR – Core power. All of these pins should be returned to nominal 1.8V or to PWROUT if the built-in power switch is used. VC33 13, 50, 83 PWR – Periphery power. All these pins should be returned to nominal 3.3V. PWRIN 29 PWR – Power switch input; should be returned to nominal 1.8V even if the power switch is not used. PWROUT 28 PWR – Power switch output; should be connected to all VC18 pins if the power switch is used D7 - D0 96, 95, 91, 90, 82, 81, 77, 76 I/O 1 Slave 8-bit interface data. Output if CS and RD are low (read from chip), input if CS and WR are low (write to chip). Type of data defined by A0 input. I/O7 - I/O0 96, 95, 91, 90, 82, 81, 77, 76 I/O 1 SmartMedia data or other peripheral data P0.7 - P0.0 96, 95, 91, 90, 82, 81, 77, 76 I/O 1 General-purpose I/O; can be programmed individually as input or output. CLAD3 - 0 96, 95, 91, 90 In 1 Optional bit clocks for digital audio input. Used for sampling rate conversion for external incoming digital audio such as AES/BEU or S/Pdif. WSAD3 - 0 82, 81, 77, 76 In 1 Optional word selects for digital audio input. Used for sampling rate conversion for external incoming digital audio such as AES/BEU or S/Pdif. A0 98 In 2 Slave 8-bit interface address. Indicates data/status or data/ctrl transfer type (CS/RD, low or CS/WR low) SMPD 98 In 2 SmartMedia presence detect P0.10 98 In 2 General-purpose input pin SCLK 98 In 2 Serial slave synchronous interface input clock CS 100 In 3 Slave 8-bit interface chip select, active low. P0.11 100 In 3 General-purpose input pin SYNC 100 In 3 Serial slave synchronous interface input sync signal WR 1 In 4 Slave 8-bit interface write, active low. D7 - D0 data is sampled by chip on WR rising edge if CS is low SMC 1 In 4 SmartMedia configuration. This pin is sensed after power-up. If found low, it is assumed that a SmartMedia connector is present. The built-in firmware will wait for SmartMedia SMPD. P0.12 1 In 4 General-purpose input pin |
|
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |