14

ATSAM3308

6090A–DRMSD–08/04

Peripherals and Timings

8-bit Slave Parallel

Interface

The Slave Parallel Interface is typically used to connect the chip to a host processor.

Pins used: D7 - D0 (I/O), A0 (Input), WR (Input), RD (Input), IRQ (Output).

Timings

Figure 5. Host Interface Read Cycle

Figure 6. Host Interface Write Cycle

Table 7. Timing Parameters

Symbol

Parameter

Min

Typ

Max

Unit

t

AVCS

Address valid to chip select low

0

-

-

ns

t

CSLRDL

Chip select low to RD low

5

-

-

ns

t

RDHCSH

RD high to CS high

5

-

-

ns

t

PRD

RD pulse width

50

-

-

ns

t

RDLDV

Data out valid from RD

-

-

20

ns

t

DRH

Data out hold from RD

5

-

10

ns

t

CSLRWRL

Chip select low to WR low

5

-

-

ns

t

WRHCSH

WR high to CS high

5

-

-

ns

t

PWR

WR pulse width

50

-

-

ns

t

DWS

Write data setup time

10

-

-

ns

t

DWH

Write data hold time

0

-

-

ns

A0

CS

RD

D0-D7

A0

CS

RD

D0-D7