MC56F81663 datasheet(25/73 Pages) NXP

25 / 73 page

Table 2. Signal descriptions (continued)

Signal Name

LQFP

LQFP/

QFN

State

During

Reset

Type

Signal Description

GPIOF6

—

Input

Input/

Output

GPIO Port F6 — After reset, the default state is

GPIOF6.

(PWMA_3X)

Input/

Output

PWM submodule 3, output X or input capture X.

LP_SCLS1

Output

I2C1 secondary serial clock line.

NOTE: In 4-wire mode, this is the I2C slave SCL

output for voltage level shift.

(XB_IN2)

Input

Crossbar module input 2.

GPIOF7

—

Input

Input/

Output

GPIO Port F7 — After reset, the default state is

GPIOF7.

(CMPC_O)

Output

Analog comparator C output.

LP_SDAS1

Output

I2C1 secondary serial data line.

NOTE: In 4-wire mode, this is the I2C slave SDA

output for voltage level shift.

(XB_IN3)

Input

Crossbar module input 3.

GPIOF8

—

Input

Input/

Output

GPIO Port F8 — After reset, the default state is

GPIOF8.

(RXD0)

Input

SCI0 receive data input.

(XB_OUT10)

Output

Crossbar module output 10.

(CMPD_O)

Output

Analog comparator D output.

(PWMA_2X)

Output

PWM submodule 2, output X or input capture X.

1. The glitch on this pin during ADC sampling may interfere with other analog inputs shared on this pin.

3 Signal groups

The input and output signals of the MC56F81xxx are organized into functional groups, as

detailed in the following table.

Table 3. Functional Group Pin Allocations

Functional Group

Number of Pins

32LQFP

48LQFP

64LQFP

Power Inputs (VDD, VDDA), Power output( VCAP)

Ground (VSS, VSSA)

Reset

eFlexPWM outputs high resolution PWM

eFlexPWM outputs without high resolution PWM

Queued Serial Peripheral Interface (QSPI0) ports

Queued Serial Communications Interface (QSCI0 and QSCI11) ports

Table continues on the next page...

Signal groups

MC56F81xxx, Rev. 1.1, 12/2020

NXP Semiconductors

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