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AM6421 bảng dữ liệu(PDF) 204 Page - Texas Instruments

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AM6421 bảng dữ liệu(HTML) 204 Page - Texas Instruments

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Table 7-116. Timer Timing Conditions
PARAMETER
MIN
MAX
UNIT
INPUT CONDITIONS
SRI
Input slew rate
0.5
5
V/ns
OUTPUT CONDITIONS
CL
Output load capacitance
2
10
pF
Table 7-117. Timer Input Timing Requirements
see Figure 7-107
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
T1
tw(TINPH)
Pulse duration, high
CAPTURE
2 + 4P
(1)
ns
T2
tw(TINPL)
Pulse duration, low
CAPTURE
2 + 4P
(1)
ns
(1)
P = functional clock period in ns.
Table 7-118. Timer Output Switching Characteristics
see Figure 7-107
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
T3
tw(TOUTH)
Pulse duration, high
PWM
-2 + 4P
(1)
ns
T4
tw(TOUTL)
Pulse duration, low
PWM
-2 + 4P
(1)
ns
(1)
P = functional clock period in ns.
T1
T2
TIMER_IOx (inputs)
TIMER_01
T3
T4
TIMER_IOx (outputs)
Figure 7-107. Timer Timing Requirements and Switching Characteristics
For more information, see Timers section in Peripherals chapter in the device TRM.
7.10.5.18 UART
For more details about features and additional description information on the device Universal Asynchronous
Receiver Transmitter, see the corresponding sections within Section 6.3, Signal Descriptions and Section 8,
Detailed Description.
Table 7-119. UART Timing Conditions
PARAMETER
MIN
MAX
UNIT
INPUT CONDITIONS
SRI
Input slew rate
0.5
5
V/ns
OUTPUT CONDITIONS
CL
Output load capacitance
1
30
pF
Table 7-120. UART Timing Requirements
see Figure 7-108
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
4
tw(RX)
Pulse width, receive data bit, high or low
0.95U
(1)
1.05U
(1)
ns
AM6442, AM6441, AM6421
AM6412, AM6411
SPRSP56 – JANUARY 2021
www.ti.com
204
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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