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STPMIC1APQR bảng dữ liệu(PDF) 5 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  Highly integrated power management IC for micro processor units
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STPMIC1APQR bảng dữ liệu(HTML) 5 Page - STMicroelectronics

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2.2
Pinout and pin description
Figure 2. Pin configuration WFQFN 44L top view
EPGND
RSTn 1
WAKEUP 2
SDA 3
SCL 4
VOUT1 5
PGND1 6
VLX1 7
BUCK1IN 8
VOUT2 9
PGND2 10
VLX2 11
BUCK2IN 12
23 LDO1OUT
24 BUCK4IN
25 VLX4
26 PGND4
27 VOUT4
28 BUCK3IN
29 VLX3
30 PGND3
31 VOUT3
32 PGBOOST
33 VLXBST
34 BOUT
Table 3. Pin description
Pin name
A/D(1) I/O
Location
Description (default configuration)
RSTn
D
I/O
1
Bi-directional reset (active low with internal pull-up)
WAKEUP
D
I
2
Power-ON from host processor (active high with internal pull-down)
SDA
D
I/O
3
I2C serial data
SCL
D
I
4
I2C serial clock
VOUT1
A
I
5
Input feedback signal buck converter 1
PGND1
A
-
6
Power ground buck converter 1
VLX1
A
O
7
LX node buck converter 1
BUCK1IN
A
I
8
Power input buck converter 1 must be connected to the same value of VIN pin
VOUT2
A
I
9
Input feedback signal buck converter 2
PGND2
A
-
10
Power ground buck converter 2
VLX2
A
O
11
LX node buck converter 2
BUCK2IN
A
I
12
Power input buck converter 2 must be connected to the same value of VIN pin
LDO3IN
A
I
13
Power input LDO3
LDO3OUT
A
O
14
Output voltage LDO3
GNDLDO
A
-
15
LDO GND
VREFDDR
A
O
16
DDR VREF output voltage
PONKEYn
D
I
17
User power ON key (active low with internal pullup)
STPMIC1
Pinout and pin description
DS12792 - Rev 7
page 5/140



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