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STM32WB35CCU6ATR bảng dữ liệu(PDF) 164 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5 and 802.15.4 radio solution
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STM32WB35CCU6ATR bảng dữ liệu(HTML) 164 Page - STMicroelectronics

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Electrical characteristics
STM32WB55xx STM32WB35xx
164/193
DS11929 Rev 10
Table 95. Quad-SPI characteristics in DDR mode(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
FCK
1/t(CK)
Quad-SPI clock
frequency
1.65 < VDD < 3.6 V, CLOAD = 20 pF
Voltage Range 1
--
40
MHz
2.0 < VDD < 3.6 V, CLOAD = 20 pF
Voltage Range 1
--
50
1.65 < VDD < 3.6 V, CLOAD = 15 pF
Voltage Range 1
--
48
1.65 < VDD < 3.6 V CLOAD = 20 pF
Voltage Range 2
--
16
tw(CKH) Quad-SPI clock
high and low time
fAHBCLK = 48 MHz, presc=0
t(CK)/2
-
t(CK)/2 + 1
ns
tw(CKL)
t(CK)/2 - 1
-
t(CK)/2
tsr(IN)
Data input setup
time on rising edge
Voltage Range 1
2.5
--
Voltage Range 2
3.5
tsf(IN)
Data input setup
time on falling edge
Voltage Range 1
2.5
--
Voltage Range 2
1.5
thr(IN)
Data input hold
time on rising edge
Voltage Range 1
5.5
--
Voltage Range 2
6.5
thf(IN)
Data input hold
time on falling edge
Voltage Range 1
5
--
Voltage Range 2
6
tvr(OUT)
Data output valid
time on rising edge
Voltage Range 1
DHHC=0
-
45.5
DHHC=1
t(CK)/2 + 1 t(CK)/2 + 1.5
Voltage Range 2
4.5
7
tvf(OUT)
Data output valid
time on falling edge
Voltage Range 1
DHHC=0
-
46
DHHC=1
t(CK)/2 + 1
t(CK)/2 + 2
Voltage Range 2
6
7.5
thr(OUT)
Data output hold
time on rising edge
Voltage Range 1
DHHC=0
2
-
-
DHHC=1 t(CK)/2 + 0.5
-
-
Voltage Range 2
3.5
-
-
thf(OUT)
Data output hold
time on falling edge
Voltage Range 1
DHHC=0
3
-
-
DHHC=1 t(CK)/2 + 0.5
-
-
Voltage Range 2
5
-
-
1. Guaranteed by characterization results.



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