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STM32L552CCT3PTR bảng dữ liệu(PDF) 78 Page - STMicroelectronics

tên linh kiện STM32L552CCT3PTR
Giải thích chi tiết về linh kiện  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 165 DMIPS, up to 512 KB Flash memory, 256 KB SRAM, SMPS
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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STM32L552CCT3PTR bảng dữ liệu(HTML) 78 Page - STMicroelectronics

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Functional overview
STM32L552xx
78/340
DS12737 Rev 6
The controller uses specific I/Os supporting the USB Type-C and USB Power Delivery
requirements, featuring:
•
USB Type-C pull-up (Rp, all values) and pull-down (Rd) resistors
•
“Dead battery” support
•
USB Power Delivery message transmission and reception
•
FRS (fast role swap) support
The digital controller handles notably:
•
USB Type-C level detection with debounce, generating interrupts
•
FRS detection, generating an interrupt
•
Byte-level interface for USB Power Delivery payload, generating interrupts (DMA
compatible)
•
USB Power Delivery timing dividers (including a clock pre-scaler)
•
CRC generation/checking
•
4b5b encode/decode
•
Ordered sets (with a programmable ordered set mask at receive)
•
Frequency recovery in receiver during preamble
The interface offers low-power operation compatible with Stop mode, maintaining the
capacity to detect incoming USB Power Delivery messages and FRS signaling.
3.42
Development support
3.42.1
Serial wire JTAG debug port (SWJ-DP)
The Arm® SWJ-DP interface is embedded, and is a combined JTAG and serial wire debug
port that enables either a serial wire debug or a JTAG probe to be connected to the target.
Debug is performed using two pins only instead of five required by the JTAG (JTAG pins
could be re-used as GPIO with alternate function): the JTAG TMS and TCK pins are shared
with SWDIO and SWCLK, respectively, and a specific sequence on the TMS pin is used to
switch between JTAG-DP and SW-DP.
3.42.2
Embedded Trace Macrocell™
The Arm® Embedded Trace Macrocell provides a greater visibility of the instruction and data
flow inside the CPU core by streaming compressed data at a very high rate from the devices
through a small number of ETM pins to an external hardware trace port analyzer (TPA)
device. Real-time instruction and data flow activity be recorded and then formatted for
display on the host computer that runs the debugger software. TPA hardware is
commercially available from common development tool vendors.
The Embedded Trace Macrocell operates with third party debugger software tools.



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