STM32F334C8U6TR datasheet(75/125 Pages) STMICROELECTRONICS

75 / 125 page

DS9994 Rev 9

75/125

STM32F334x4 STM32F334x6 STM32F334x8

Electrical characteristics

103

6.3.12

Electrical sensitivity characteristics

Based on three different tests (ESD, LU) using specific measurement methods, the device is

stressed to determine its performance in terms of electrical sensitivity.

Electrostatic discharge (ESD)

Electrostatic discharges (a positive then a negative pulse separated by 1 second) are

applied to the pins of each sample according to each pin combination. The sample size

depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test

conforms to the JESD22-A114/C101 standard.

Static latch-up

Two complementary static tests are required on six parts to assess the latch-up

performance:

•

A supply overvoltage is applied to each power supply pin

•

A current injection is applied to each input, output and configurable I/O pin

These tests are compliant with EIA/JESD 78A IC latch-up standard.

6.3.13

I/O current injection characteristics

As a general rule, current injection to the I/O pins, due to external voltage below VSS or

above VDD (for standard, 3 V-capable I/O pins) must be avoided during normal product

operation. However, to give an indication of the robustness of the microcontroller in cases

when abnormal injection accidentally happens, susceptibility tests are performed on a

sample basis during device characterization.

Functional susceptibility to I/O current injection

While a simple application is executed on the device, the device is stressed by injecting

current into the I/O pins programmed in floating input mode. While current is injected into

the I/O pin, one at a time, the device is checked for functional failures.

Table 47. ESD absolute maximum ratings

Symbol

Ratings

Conditions

Class

Maximum

value(1)

1. Data based on characterization results, not tested in production.

Unit

VESD

(HBM)

Electrostatic discharge

voltage (human body model)

TA = +25 °C,

conforming to JESD22-

A114

22000

VESD

(CDM)

Electrostatic discharge

voltage (charge device

model)

TA = +25 °C,

conforming to JESD22-

C101

250

Table 48. Electrical sensitivities

Symbol

Parameter

Conditions

Class

Static latch-up class

TA = +105 °C conforming to JESD78A

II level A

STM32F334C8U6TR bảng dữ liệu(PDF) 75 Page - STMicroelectronics

STM32F334C8U6TR bảng dữ liệu(HTML) 75 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL