RA4M1 datasheet(80/130 Pages) RENESAS

80 / 130 page

R01DS0355EJ0100 Rev.1.00

Page 80 of 130

Oct 8, 2019

RA4M1 Group

2. Electrical Characteristics

Figure 2.58

SPI timing for slave when CPHA = 1

2.3.10

IIC Timing

Table 2.37

IIC timing (1 of 2)

Conditions: VCC = 2.7 to 5.5 V

Parameter

Symbol

Min*1

Max

Unit

Test

conditions

IIC

(standard mode,

SMBus)

SCL input cycle time

tSCL

6 (12) × tIICcyc +

1300

-ns

Figure 2.59

SCL input high pulse width

tSCLH

3 (6) × tIICcyc +

300

-ns

SCL input low pulse width

tSCLL

3 (6) × tIICcyc +

300

-ns

SCL, SDA input rise time

tSr

1,000

SCL, SDA input fall time

tSf

-300

SCL, SDA input spike pulse removal

time

tSP

1 (4) × tIICcyc

SDA input bus free time

(When wakeup function is disabled)

tBUF

3 (6) × tIICcyc +

300

-ns

SDA input bus free time

(When wakeup function is enabled)

tBUF

3 (6) × tIICcyc +

4 × tPcyc + 300

-ns

START condition input hold time

(When wakeup function is disabled)

tSTAH

tIICcyc + 300

START condition input hold time

(When wakeup function is enabled)

tSTAH

1 (5) × tIICcyc +

tPcyc + 300

-ns

Repeated START condition input setup

time

tSTAS

1,000

STOP condition input setup time

tSTOS

1,000

Data input setup time

tSDAS

tIICcyc + 50

Data input hold time

tSDAH

SCL, SDA capacitive load

-400

SSLn0

input

RSPCKn

CPOL = 0

input

RSPCKn

CPOL = 1

input

MISOn

output

MOSIn

input

tDr, tDf

tSA

tOH

tLEAD

tTD

tLAG

LSB OUT

(Last data)

DATA

MSB OUT

MSB IN

DATA

LSB IN

MSB IN

LSB OUT

tSU

tOD

tREL

MSB OUT

n = A or B

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