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MPF5024AMMA0ES bảng dữ liệu(PDF) 44 Page - NXP Semiconductors |
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MPF5024AMMA0ES bảng dữ liệu(HTML) 44 Page - NXP Semiconductors |
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44 / 93 page ![]() NXP Semiconductors PF5024 Power management integrated circuit (PMIC) for high performance applications PF5024 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 1 — 15 April 2020 44 / 93 aaa-029991 Dual PMIC interaction (Fault on Master PMIC) Power Up Sequence is started until both XFAILB are pulled high XFAILB Debounced Pin externally pulled down Slave Ready to start Power Up Sequence (waiting) FAULT EVENT MASTER PMIC EWARN PWRON XFAILB POWER DOWN Signal POWER DOWN Sequence POWER UP Sequence 20 µs 20 µs 100 µs SLAVE PMIC EWARN XFAILB POWER DOWN Signal POWER DOWN Sequence POWER UP Sequence Figure 20. Behavior during an external XFAILB event aaa-029992 XFAILB During Power Up Sequence Slave Ready to start Power Up Sequence (waiting) Pin externally pulled down 2 ms MASTER PMIC PWRON XFAILB RESETBMCU POWER DOWN Signal POWER UP Sequence POWER UP Sequence SLAVE PMIC XFAILB POWER DOWN Signal Power Up Sequence is started until both XFAILB are pulled high Figure 21. External XFAILB event during a power up sequence |
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