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MPF5023AMMA0ES bảng dữ liệu(PDF) 4 Page - NXP Semiconductors

tên linh kiện MPF5023AMMA0ES
Giải thích chi tiết về linh kiện  Power management integrated circuit (PMIC) for high performance applications
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MPF5023AMMA0ES bảng dữ liệu(HTML) 4 Page - NXP Semiconductors

  MPF5023AMMA0ES Datasheet HTML 1Page - NXP Semiconductors MPF5023AMMA0ES Datasheet HTML 2Page - NXP Semiconductors MPF5023AMMA0ES Datasheet HTML 3Page - NXP Semiconductors MPF5023AMMA0ES Datasheet HTML 4Page - NXP Semiconductors MPF5023AMMA0ES Datasheet HTML 5Page - NXP Semiconductors MPF5023AMMA0ES Datasheet HTML 6Page - NXP Semiconductors MPF5023AMMA0ES Datasheet HTML 7Page - NXP Semiconductors MPF5023AMMA0ES Datasheet HTML 8Page - NXP Semiconductors MPF5023AMMA0ES Datasheet HTML 9Page - NXP Semiconductors Next Button
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NXP Semiconductors
PF5023
Power management integrated circuit (PMIC) for high performance applications
PF5023
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 1 — 15 April 2020
4 / 91
7 Pinning information
7.1 Pinning
aaa-032236
SCL
30
SDA
29
VDDOTP
28
SYNC
27
PGOOD
26
INTB
25
V1P5D
24
V1P5A
23
STANDBY
22
XFAILB
21
SW2FB 1
SW1IN 2
SW1LX 3
SW2LX 4
SW2IN 5
SW3IN 6
SW3LX
EPAD
7
NC1 8
NC2 9
NC3 10
Figure 3. Pin configuration for 40-pin QFN
7.2 Pin description
Table 2. Pin description
QFN pin
number
Pin name
Pin description
Min
Max
Units
1
SW2FB
SW2 feedback input
−0.3
6.0
V
2
SW1IN
SW1 input supply
−0.3
6.0
V
3
SW1LX
SW1 switching node
−0.3
6.0
V
4
SW2LX
SW2 switching node
−0.3
6.0
V
5
SW2IN
SW2 input supply
−0.3
6.0
V
6
SW3IN
SW3 input supply
−0.3
6.0
V
7
SW3LX
SW3 switching node
−0.3
6.0
V
8
NC1
not connected
−0.3
6.0
V
9
NC2
not connected
−0.3
6.0
V
10
NC3
not connected
−0.3
6.0
V
11
SW3FB
SW3 feedback input
−0.3
6.0
V
12
NC4
not connected
−0.3
6.0
V
13
EN3
SW3 enable input
−0.3
6.0
V
14
NC5.
not connected
−0.3
6.0
V



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