MPF5023AMMA0ES datasheet(22/91 Pages) NXP

22 / 91 page

NXP Semiconductors

PF5023

Power management integrated circuit (PMIC) for high performance applications

PF5023

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 15 April 2020

22 / 91

Figure 9 shows an example of the power up/down sequence when transitioning between

Run and Standby modes.

aaa-032745

PWRUP_l

PWRDN_l

Run Mode

STBY Mode

PWRDN Sequence

from Run to STBY

PWRUP Sequence

from STBY to Run

INTB

RESETBMCU

SW3

SW2

SW1

Figure 9. Power up/down sequence between run and standby

The PWRUP_I interrupt is set while transitioning from standby to run, even if the

sequencer is not used. This is used to indicate that the transition is complete and device

is ready to perform proper operation.

14.6 Power down

14.6.1 Turn off events

Turn off events may be requested by the MCU (non-PMIC fault related) or due to a

critical failure of the PMIC (hard fault condition).

The following are considered non-PMIC failure turn off events:

1. When OTP_PWRON_MODE = 0, the device starts a power down sequence when the

PWRON pin is pulled low.

2. When OTP_PWRON_MODE = 1, the device starts a power down sequence when

the PWRON pin sees a transition from high to low and remains low for longer than

TRESET.

3. When bit PMIC_OFF is set to 1, the device starts a 500 µs shutdown timer. When

the shutdown timer is started, the PF5023 sets the SDWN_I interrupt and asserts

the INTB pin provided it is not masked. At this point, the MCU can read the interrupt

and decide whether to continue with the turn off event or stop it in case it was sent by

mistake.

If the SDWN_I bit is cleared before the 500 µs shutdown timer is expired, the

shutdown request is canceled and the shutdown timer is reset; otherwise, if the

shutdown timer is expired, the PF5023 starts a power down sequence.

The PMIC_OFF bit self-clears after SDWN_I flag is cleared.

4. When VIN_OVLO_EN = 1 and VIN_OVLO_SDWN = 1, and a VIN_OVLO event is

present.

Turn off events due to a hard fault condition:

1. If an OV, UV or ILIM condition is present long enough for the fault timer to expire.

2. In the event that an OV, UV or ILIM condition appears and clears cyclically, and the

FAULT_CNT[3:0] = FAULT_MAX_CNT[3:0].

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