MSP430F6435IPZR datasheet(94/128 Pages) TI

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9.13.5 Port P5 (P5.0 and P5.1) Input/Output With Schmitt Trigger

Figure 9-6 shows the pin diagram. Table 9-54 summarizes how to select the pin function.

P5.0/VREF+/VeREF+

P5.1/VREF–/VeREF–

P5SEL.x

P5DIR.x

P5IN.x

Module X IN

Module X OUT

P5OUT.x

P5REN.x

Pad Logic

P5DS.x

0: Low drive

1: High drive

Bus

Keeper

To/From

Reference

Figure 9-6. Port P5 (P5.0 and P5.1) Diagram

Table 9-54. Port P5 (P5.0 and P5.1) Pin Functions

PIN NAME (P5.x)

FUNCTION

CONTROL BITS OR SIGNALS(1)

P5DIR.x

P5SEL.x

REFOUT

P5.0/VREF+/VeREF+

P5.0 (I/O)(2)

I: 0; O: 1

VeREF+(3)

VREF+(4)

P5.1/VREF-/VeREF-

P5.1 (I/O)(2)

I: 0; O: 1

VeREF-(5)

VREF-(6)

(1)

X = Don't care

(2)

Default condition

(3)

Setting the P5SEL.0 bit disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying

analog signals. An external voltage can be applied to VeREF+ and used as the reference for the ADC12_A, Comparator_B, or

DAC12_A.

(4)

Setting the P5SEL.0 bit disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying

analog signals. The ADC12_A VREF+ reference is available at the pin.

(5)

Setting the P5SEL.1 bit disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying

analog signals. An external voltage can be applied to VeREF- and used as the reference for the ADC12_A, Comparator_B, or

DAC12_A.

(6)

Setting the P5SEL.1 bit disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying

analog signals. The ADC12_A VREF- reference is available at the pin.

MSP430F6438, MSP430F6436, MSP430F6435, MSP430F6433

SLAS720F – AUGUST 2010 – REVISED SEPTEMBER 2020

www.ti.com

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