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MCP2517FD bảng dữ liệu(PDF) 73 Page - Microchip Technology

tên linh kiện MCP2517FD
Giải thích chi tiết về linh kiện  External CAN FD Controller with SPI Interface
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MCP2517FD bảng dữ liệu(HTML) 73 Page - Microchip Technology

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 2017-2018 Microchip Technology Inc.
DS20005688B-page 73
MCP2517FD
5.0
OSCILLATOR
Figure 5-1 shows the block diagram of the oscillator in
the MCP2517FD. The oscillator system generates the
SYSCLK, which is used in the CAN FD Controller
Module and for RAM accesses. It is recommended by
the CAN FD community to use either a 40 or 20 MHz
SYSCLK.
The time reference for clock generation can be an
external 40, 20 or 4 MHz crystal, ceramic resonator or
external clock.
The OSC register controls the oscillator. The PLL can
be enabled to multiply the 4 MHz clock by 10.
The internal 40/20 MHz can be divided by two.
The internally generated clock can be divided and pro-
vided on the CLKO pin.
FIGURE 5-1:
MCP2517FD OSCILLATOR BLOCK DIAGRAM
OSC1
OSC2
PLLEN
OSCDIS
Divide
By 1, 2
SCLKDIV
SYSCLK
Divide
By 1, 2, 4, 10
CLKO
CLKODIV
PLL
x10
40/20 MHz



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