LSM9DS1TR datasheet(24/72 Pages) STMICROELECTRONICS

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LSM9DS1 functionality

LSM9DS1

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DocID025715 Rev 3

3.5.2

FIFO mode

In FIFO mode (FIFO_CTRL (2Eh) (FMODE [2:0] = 001) data from the output channels are

stored in the FIFO until it is overwritten.

To reset FIFO content, Bypass mode should be selected by writing FIFO_CTRL (2Eh)

(FMODE [2:0]) to '000'. After this reset command, it is possible to restart FIFO mode by

writing FIFO_CTRL (2Eh) (FMODE [2:0]) to '001'.

The FIFO buffer memorizes 32 levels of data but the depth of the FIFO can be resized by

setting the STOP_ON_FTH bit in CTRL_REG9 (23h). If the STOP_ON_FTH bit is set to '1',

FIFO depth is limited to FIFO_CTRL (2Eh)(FTH [4:0]) + 1 data.

A FIFO threshold interrupt can be enabled (INT_OVR bit in INT1_CTRL (0Ch) ) in order to

be raised when the FIFO is filled to the level specified by the FTH[4:0] bits of FIFO_CTRL

(2Eh). When a FIFO threshold interrupt occurs, the first data has been overwritten and the

FIFO stops collecting data from the input channels.

Figure 11. FIFO mode

3.5.3

Continuous mode

Continuous mode (FIFO_CTRL (2Eh)(FMODE[2:0] = 110) provides continuous FIFO

update: as new data arrives the older is discarded.

A FIFO threshold flag FIFO_SRC (2Fh)(FTH) is asserted when the number of unread

samples in FIFO is greater than or equal to FIFO_CTRL (2Eh)(FTH4:0).

It is possible to route FIFO_SRC (2Fh)(FTH) to the INT1_A/G pin by writing in register

INT1_CTRL (0Ch) (INT1_FTH) = '1', or to the INT2_A/G pin by writing in register

INT2_CTRL (0Dh) (INT2_FTH) = '1'.

A full-flag interrupt can be enabled, (INT1_CTRL (0Ch) (INT_ FSS5)= '1’) when the FIFO

becomes saturated and in order to read the contents all at once.

If an overrun occurs, the oldest sample in FIFO is overwritten and the OVRN flag in

FIFO_SRC (2Fh) is asserted.

In order to empty the FIFO before it is full it is also possible to pull from FIFO the number of

unread samples available in FIFO_SRC (2Fh) (FSS[5:0]).

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