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ADC3541 bảng dữ liệu(PDF) 47 Page - Texas Instruments

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tên linh kiện ADC3541
Giải thích chi tiết về linh kiện  ADC354x 14-bit, 10-MSPS to 65-MSPS, Low-noise, Ultra-low Power ADC
PDF  68 Pages
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Trang chủ  http://www.ti.com
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ADC3541 bảng dữ liệu(HTML) 47 Page - Texas Instruments

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Figure 7-46. Register 0x0D (PDN GLOBAL MASK)
7
6
5
4
3
2
1
0
0
0
MASK REFSYS
A
0
MASK CLKBUF MASK REFAMP MASK BG DIS
0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Table 7-21. Register 0x0D Field Descriptions
Bit
Field
Type
Reset
Description
7
0
R/W
0
Must write 0
6
0
R/W
0
Must write 0
5
MASK REFSYS A
R/W
0
Global power down mask control for internal bias currents, ADC
channel A.
0: Internal bias currents will get powered down when global
power down is exercised.
1: Internal bias currents will NOT get powered down when global
power down is exercised.
4
0
R/W
0
Must write 0
3
MASK CLKBUF
R/W
0
Global power down mask control for sampling clock input buffer.
0: Clock buffer will get powered down when global power down
is exercised.
1: Clock buffer will NOT get powered down when global power
down is exercised.
2
MASK REFAMP
R/W
0
Global power down mask control for reference amplifier.
0: Reference amplifier will get powered down when global power
down is exercised.
1: Reference amplifier will NOT get powered down when global
power down is exercised.
1
MASK BG DIS
R/W
0
Global power down mask control for internal 1.2V bandgap
voltage reference. Setting this bit reduces power consumption in
global power down mode but increases the wake up time. See
the power down option overview.
0: Internal 1.2V bandgap voltage reference will NOT get
powered down when global power down is exercised.
1: Internal 1.2V bandgap voltage reference will get powered
down when global power down is exercised.
0
0
R/W
0
Must write 0
www.ti.com
ADC3541
SBAS840 – JULY 2020
Copyright © 2020 Texas Instruments Incorporated
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