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LPC55S6X bảng dữ liệu(PDF) 77 Page - NXP Semiconductors |
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LPC55S6X bảng dữ liệu(HTML) 77 Page - NXP Semiconductors |
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77 / 128 page ![]() LPC55S6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2020. All rights reserved. Product data sheet Rev. 1.9 — 10 February 2020 77 of 128 NXP Semiconductors LPC55S6x 32-bit ARM Cortex-M33 microcontroller 10.3.1 Peripheral Power Consumption Table 21 shows the typical peripheral power consumption measured on a typical sample at Tamb = 25 °C and VBAT_PMU = VBAT_DCDC = VDD = 3.3 V. The supply current per peripheral is measured as the difference in supply current between the peripheral block enabled and the peripheral block disabled using AHB clock control and PDRUNCFG registers. All other blocks are disabled and no code accessing the peripheral is executed. The supply currents are shown for system clock frequencies of 12 MHz, and 96 MHz. Conditions: all oscillators and analog blocks disabled; all SRAM disabled except 4KB SRAM powered. Flash powered down. Fig 9. Power-down mode: Typical supply current IDD versus temperature for different supply voltages VBAT_DCDC RTC input grounded. 4KB SRAM powered. Fig 10. Deep power-down mode: Typical supply current IDD versus temperature for different supply voltages VBAT_DCDC aaa-034081 -40 -10 20 50 80 110 0 14 28 42 56 70 temperature (°C) current current current (uA) (uA) (uA) aaa-034229 -40 -10 20 50 80 110 0 3 6 9 12 15 temperature (°C) current current current (μA) (μA) (μA) |
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