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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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XRT7250 bảng dữ liệu(PDF) 456 Page - Exar Corporation |
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XRT7250 bảng dữ liệu(HTML) 456 Page - Exar Corporation |
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456 / 463 page  áç áç áç áç XRT7250 DS3/E3 FRAMER IC REV. 1.1.1 437 Whenever the Terminal Equipment encounters the Detection of FEBE Event Interrupt, it should do the following. • It should read the contents of the PMON FEBE Event Count Registers (located at Addresses 0x56 and 0x57) in order to determine the number of FEBE Events that have been received by the XRT7250 Framer IC. 6.3.6.2.9 The Detection of BIP-8 Error Interrupt If the Detection of BIP-8 Error Interrupt is enabled, then the XRT7250 Framer IC will generate an inter- rupt, anytime the Receive E3 Framer block has de- tected an error in the EM (Error Monitoring) byte, within an incoming E3 frame. Enabling and Disabling the Detection of FEBE Event Interrupt The user can enable or disable the Detection of BIP-8 Error’ interrupt by writing the appropriate value into Bit 2 (BIP-8 Interrupt Enable) within the Rx E3 Inter- rupt Enable Register - 2, as indicated below. Setting this bit-field to “1” enables this interrupt. Con- versely, setting this bit-field to “0” disables this inter- rupt. Servicing the Detection of the BIP-8 Error Inter- rupt Whenever the XRT7250 Framer IC detects this inter- rupt, it will do the following. • It will assert the Interrupt Request output pin (INT), by driving it “High”. • It will set the Bit 2 (BIP-8 Interrupt Status), within the RxE3 Interrupt Status Register - 2 as indicated below. Whenever the Terminal Equipment encounters the Detection of BIP-8 Error Interrupt, it should do the fol- lowing. RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used TTB Change Interrupt Status Not Used FEBE Interrupt Status FERF Interrupt Status BIP-8 Error Interrupt Status Framing Byte Error Interrupt Status RxPld Mis Interrupt Status RO RUR RO RUR RUR RUR RUR RUR 0 0010 000 RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used TTB Change Interrupt Enable Not Used FEBE Interrupt Enable FERF Interrupt Enable BIP-8 Error Interrupt Enable Framing Byte Error Interrupt Enable RxPld Mis Interrupt Enable RO R/W RO R/W R/W R/W R/W R/W 0 0 0 X X 000 RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used TTB Change Interrupt Status Not Used FEBE Interrupt Status FERF Interrupt Status BIP-8 Error Interrupt Status Framing Byte Error Interrupt Status RxPld Mis Interrupt Status RO RUR RO RUR RUR RUR RUR RUR 0 0000 100 |
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