XRT7250 datasheet(422/463 Pages) EXAR

422 / 463 page

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XRT7250

DS3/E3 FRAMER IC

REV. 1.1.1

403

In additional to the FEBE bit-field signaling, the Re-

ceive E3 Framer block will generate the BIP-8 Error

Interrupt to the Microprocessor. Hence, it will set bit 2

(BIP-8 Error Interrupt Status) to “1”, as depicted be-

low.

Finally, the Receive E3 Framer block will increment

the PMON Parity Error Count registers. The byte for-

mat of these registers are presented below.

FIGURE 199. ILLUSTRATION OF THE LOCAL RECEIVE E3 FRAMER BLOCK, TRANSMITTING AN E3 FRAME (TO THE

REMOTE TERMINAL) WITH THE FEBE BIT (WITHIN THE MA BYTE-FIELD) SET TO “1”

Transmit E3

Framer

Receive E3

Framer

Local Terminal

Remote

Terminal

MA Byte

x1xxxxxx

FEBE bit

RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Not Used

TTB

Change

Interrupt

Status

Not Used

FEBE

Interrupt

Status

FERF

Interrupt

Status

BIP-8

Error

Interrupt

Status

Framing

Byte Error

Interrupt

Status

RxPld

Mis

Interrupt

Status

RUR

0000

000

PMON PARITY ERROR COUNT REGISTER - MSB (ADDRESS = 0X54)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Parity Error Count - High Byte

RUR

0000

000

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