XRT7250 datasheet(340/463 Pages) EXAR

340 / 463 page

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XRT7250

DS3/E3 FRAMER IC

REV. 1.1.1

321

5.3.6

Receive Section Interrupt Processing

The Receive Section of the XRT7250 can generate

an interrupt to the MIcrocontroller/Microprocessor for

the following reasons.

• Change in Receive LOS Condition

• Change in Receive OOF Condition

• Change in Receive LOF Condition

• Change in Receive AIS Condition

• Change in Receive FERF Condition

• Change of Framing Alignment

• Detection of FEBE (Far-End Block Error) Event

• Detection of BIP-4 Error

• Detection of Framing Error

• Reception of a new LAPD Message

5.3.6.1

Enabling Receive Section Interrupts

As mentioned in Section 1.6, the Interrupt Structure

within the XRT7250 contains two hierarchical levels.

• Block Level

• Source Level

The Block Level

The Enable state of the Block level for the Receive

Section Interrupts dictates whether or not interrupts

(if enabled at the source level), are actually enabled.

The user can enable or disable these Receive Sec-

tion interrupts, at the Block Level by writing the appro-

priate data into Bit 7 (Rx DS3/E3 Interrupt Enable)

within the Block Interrupt Enable register (Address =

0x04), as illustrated below.

FIGURE 153. ILLUSTRATION OF THE SIGNALS THAT ARE OUTPUT VIA THE RECEIVE PAYLOAD DATA OUTPUT INTER-

FACE BLOCK

(FOR NIBBLE-PARALLEL MODE OPERATION).

XRT7250 Receive Payload Data I/F Signals

E3 Frame Number N

E3 Frame Number N + 1

Note: RxFrame pulses high to denote

E3 Frame Boundary.

Terminal Equipment Signals

RxOutClk

Rx_Start_of_Frame

Rx_E3_Clock_In

E3_Data_In[3:0]

Overhead Nibble [0]

Overhead Nibble [1]

RxOutClk

RxFrame

RxClk

RxNib[3:0]

Overhead Nibble [0]

Overhead Nibble [1]

Recommended Sampling Edge of Terminal

Equipment

Rx_E3_OH_Ind

RxOH_Ind

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