RA4W1 datasheet(96/105 Pages) RENESAS

96 / 105 page

R01DS0359EJ0100 Rev.1.00

Page 96 of 105

Mar 31, 2020

RA4W1 Datasheet

2. Electrical Characteristics

2.16.1

Serial Wire Debug (SWD)

Figure 2.77

SWD SWCLK timing

Table 2.70

SWD characteristics (1)

Conditions: VCC = 2.4 to 3.6 V

Parameter

Symbol

Min

Typ

Max

Unit

Test conditions

SWCLK clock cycle time

tSWCKcyc

Figure 2.77

SWCLK clock high pulse width

tSWCKH

SWCLK clock low pulse width

tSWCKL

SWCLK clock rise time

tSWCKr

SWCLK clock fall time

tSWCKf

SWDIO setup time

tSWDS

Figure 2.78

SWDIO hold time

tSWDH

SWDIO data delay time

tSWDD

Table 2.71

SWD characteristics (2)

Conditions: VCC = 1.8 to 2.4 V

Parameter

Symbol

Min

Typ

Max

Unit

Test conditions

SWCLK clock cycle time

tSWCKcyc

250

Figure 2.77

SWCLK clock high pulse width

tSWCKH

120

SWCLK clock low pulse width

tSWCKL

120

SWCLK clock rise time

tSWCKr

SWCLK clock fall time

tSWCKf

SWDIO setup time

tSWDS

Figure 2.78

SWDIO hold time

tSWDH

SWDIO data delay time

tSWDD

150

SWCLK

tSWCKcyc

tSWCKH

tSWCKf

tSWCKr

tSWCKL

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