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STM8S bảng dữ liệu(PDF) 357 Page - STMicroelectronics |
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STM8S bảng dữ liệu(HTML) 357 Page - STMicroelectronics |
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357 / 467 page ![]() DocID14587 Rev 14 357/467 RM0016 Universal asynchronous receiver transmitter (UART) 377 Figure 137. UARTDIV read / write operations when LDUM = 1 Deviation error on the synch field The deviation error is checked by comparing the current baud rate (relative to the slave oscillator) with the received LIN Synch Field (relative to the master oscillator). Two checks are performed in parallel. The first check is based on a measurement between the first falling edge and the last falling edge of the Synch Field. • If D1 > 14.84% LHE is set • If D1< 14.06% LHE is not set • If 14.06% < D1 < 14.84% LHE can be either set or reset depending on the dephasing between the signal on UART_RX pin and the fMASTER clock The second check is based on a measurement of time between each falling edge of the Synch Field • If D2 > 18.75% LHE is set • If D2 < 15.62% LHE is not set • If 15.62% < D2 < 18.75% LHE can be either set or reset depending on dephasing between the signal on UART_RX pin and the fMASTER clock Note that the UART does not need to check if the next edge occurs slower than expected. This is covered by the check for deviation error on the full synch byte. |
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